Package com.diozero.devices

Class OutputShiftRegister

  • All Implemented Interfaces:
    DeviceInterface, GpioExpander, DeviceFactoryInterface, GpioDeviceFactoryInterface, PwmOutputDeviceFactoryInterface, AutoCloseable
    public class OutputShiftRegister
extends AbstractDeviceFactory
implements GpioDeviceFactoryInterface, PwmOutputDeviceFactoryInterface, GpioExpander

    Digital output device factory using an output shift register, e.g. the 74HC595 8-bit Serial-In, Parallel-Out Shift Register.

    Wiring for 74HC595

      Q1 1 16 Vcc
  Q2 2 15 Q0
  Q3 3 14 SER (Data Pin)
  Q4 4 13 ^OE (Output Enable, low == enable)
  Q5 5 12 RCLK (Storage Register Clock / Latch Pin)
  Q6 6 11 SRCLK (Shift Register Clock / Clock Pin)
  Q7 7 10 ^SRCLR (Shift Register Clear, low == clear)
 GND 8 9  Qh'

    Timings for SN74HC595

    Clock Frequency:
    2V: 5MHz, 4.5V: 25MHz, 6V: 29MHz
    Pulse Duration (SRCLK or RCLK high or low):
    2V: 100ns, 4.5V: 20ns, 6V: 17ns
    Setup Time (SER before SRCLK high):
    2V: 125ns, 4.5V: 25ns, 6V: 21ns
    Setup Time (SRCLK high before RCLK high *):
    2V: 94ns, 4.5V: 19ns, 6V: 16ns
    Hold Time (Hold time, SER after SRCLK high):
    2V: 0ns, 4.5V: 0ns, 6V: 0ns

    * This set-up time allows the storage register to receive stable data from the shift register. The clocks can be tied together, in which case the shift register is one clock pulse ahead of the storage register.

    Credit: Seggan