Ram_1wrs
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package core
Class used to create a task that must be executed after the creation of the component
Class used to create a task that must be executed after the creation of the component
Add a new prePopTask
Add a new prePopTask
Add the path of the rtl file
Add the path of the rtl file
Contains an array of all children Component
Contains an array of all children Component
Get the current clock domain (null if there is no clock domain already set )
Get the current clock domain (null if there is no clock domain already set )
Definition Name (name of the entity (VHDL) or module (Verilog))
Definition Name (name of the entity (VHDL) or module (Verilog))
Initialization class delay
Initialization class delay
Get a set of all IO available in the component
Get a set of all IO available in the component
Return the generic of the blackbox
Return the generic of the blackbox
Sort all IO regarding instanceCounter
Sort all IO regarding instanceCounter
Return the path of the parent
Return the path of the parent
toplevel/[myComponent1] // Current component is myComponent2
Return the path of the component
Return the path of the component
toplevel/[myComponent1]/[myComponent2] // Current component is myComponent2
Return true if the blackbox used the tag noNumericType
Return true if the blackbox used the tag noNumericType
Return true if the blackbox used std_ulogic
Return true if the blackbox used std_ulogic
Name allocation
Name allocation
Map clock domain signals (clock, reset, enable) to a clockDomain
Map clock domain signals (clock, reset, enable) to a clockDomain
Map clock domains signal to the current ClockDomain
Map clock domains signal to the current ClockDomain
Name all Nameable object
Name all Nameable object
No "io_" prefix in front of the in/out signals
No "io_" prefix in front of the in/out signals
Get the parent component (null if there is no parent)
Get the parent component (null if there is no parent)
Return a list of all parents of the components
Return a list of all parents of the components
Reference owner type
Reference owner type
Replace std_logic by std_ulogic
Replace std_logic by std_ulogic
Rework the component
Rework the component
Set the name of the blackbox
Set the name of the blackbox
Set the definition name of the component
Set the definition name of the component
Used to store arbitrary object related to the component
Used to store arbitrary object related to the component
Ram 1wrs