Class

spinal.core.internals

PhaseVerilog

Related Doc: package internals

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class PhaseVerilog extends PhaseMisc with VerilogBase

Linear Supertypes
VerilogBase, VhdlVerilogBase, PhaseMisc, Phase, AnyRef, Any
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Inherited
  1. PhaseVerilog
  2. VerilogBase
  3. VhdlVerilogBase
  4. PhaseMisc
  5. Phase
  6. AnyRef
  7. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new PhaseVerilog(pc: PhaseContext, report: SpinalReport[_])

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Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any

  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  4. val allocateAlgoIncrementaleBase: Int

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  5. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any

  6. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  7. def compile(component: Component): Unit

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  8. def emitClockEdge(clock: String, edgeKind: EdgeKind): String

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    Definition Classes
    VerilogBase

  9. def emitCommentAttributes(attributes: Iterable[Attribute]): String

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    Definition Classes
    VerilogBase

  10. def emitDirection(baseType: BaseType): String

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    Definition Classes
    VerilogBase

  11. def emitEnumLiteral[T <: SpinalEnum](enum: SpinalEnumElement[T], encoding: SpinalEnumEncoding, prefix: String = "`"): String

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    Definition Classes
    VerilogBase

  12. def emitEnumPackage(out: FileWriter): Unit

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  13. def emitEnumType(enum: SpinalEnum, encoding: SpinalEnumEncoding, prefix: String = "`"): String

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    Definition Classes
    VerilogBase

  14. def emitEnumType[T <: SpinalEnum](enum: SpinalEnumCraft[T], prefix: String): String

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    Definition Classes
    VerilogBase

  15. def emitExpressionWrap(e: Expression, name: String, nature: String): String

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    Definition Classes
    VerilogBase

  16. def emitExpressionWrap(e: Expression, name: String): String

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    Definition Classes
    VerilogBase

  17. def emitFunctions(component: Component, ret: StringBuilder): Unit

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  18. def emitRange(node: WidthProvider): String

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    Definition Classes
    VerilogBase

  19. def emitResetEdge(reset: String, polarity: Polarity): String

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    Definition Classes
    VerilogBase

  20. def emitSyntaxAttributes(attributes: Iterable[Attribute]): String

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    Definition Classes
    VerilogBase

  21. def emitType(e: Expression): String

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    Definition Classes
    VerilogBase

  22. val emitedComponent: Map[ComponentEmitterTrace, Component]

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  23. val emitedComponentRef: ConcurrentHashMap[Component, Component]

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  24. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  25. def equals(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  26. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )

  27. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any

  28. def getReEncodingFuntion(spinalEnum: SpinalEnum, source: SpinalEnumEncoding, target: SpinalEnumEncoding): String

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    Definition Classes
    VerilogBase

  29. def hasNetlistImpact: Boolean

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    Definition Classes
    PhaseMisc → Phase

  30. def hashCode(): Int

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    Definition Classes
    AnyRef → Any

  31. def impl(pc: PhaseContext): Unit

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    Definition Classes
    PhaseVerilog → Phase

  32. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any

  33. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  34. final def notify(): Unit

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    Definition Classes
    AnyRef

  35. final def notifyAll(): Unit

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    Definition Classes
    AnyRef

  36. var outFile: FileWriter

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  37. def signalNeedProcess(baseType: BaseType): Boolean

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    Definition Classes
    VerilogBase

  38. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef

  39. def targetPath: String

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  40. def toString(): String

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    Definition Classes
    AnyRef → Any

  41. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  42. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  43. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Inherited from VerilogBase

Inherited from VhdlVerilogBase

Inherited from PhaseMisc

Inherited from Phase

Inherited from AnyRef

Inherited from Any

Ungrouped