Counter of bit write/read.
Counter of bit write/read. MSB is send first on the I2C bus so counter goes from dataWdith to 0
Read a data on the I2C bus
Read a data on the I2C bus
: The read signal of the sda
: Register that will contains the data receveid
Generate and manage the scl clock, signals to indicate the rising and falling edge of SCL as well as a signal to indicate when to execute a start/stop/restart operation
Main state machine of the Master HAL
State machine which synchronize all SCL signals of the different master in the case when several master drive the SCL.
Write a data on the I2C
Write a data on the I2C
: The write signal of the sda
: Data that will be sent on the I2C
: If not null, the data write will be read to check if collision exist on the bus (multi master)
Definition of the component I2C Master HAL