Stream
Related Docs:
object Stream
| package lib
Connect that to this.
Connect that to this. The valid/payload/ready path are cut by an register stage
Connect that to this.
Connect that to this. The valid/payload path are cut by an register stage
Connect that to this.
Connect that to this. The ready path is cut by an register stage
Connect that to this
Connect this to that.
Connect this to that. The valid/payload path are cut by an register stage
Connect that to this.
Connect that to this. The valid/payload/ready path are cut by an register stage
Connect this to that.
Connect this to that. The ready path is cut by an register stage
Connect this to that
Like addFragmentLast(Bool), but instead of manually telling which values go together, let a counter do the job.
Like addFragmentLast(Bool), but instead of manually telling which values go together, let a counter do the job.
The counter will increment for each passing element. Last will be set high at the end of each revolution.
outStream = inStream.addFragmentLast(new Counter(5))
Convert this stream to a fragmented stream by adding a last bit.
Convert this stream to a fragmented stream by adding a last bit.
To view it from another perspective, bundle together successive events as fragments of a larger whole. You can then use enhanced operations on fragmented streams, like reducing of elements.
Drive arbitration signals of this from that
A combinatorial stage doesn't do anything, but it is nice to separate signals for combinatorial transformations.
Block this when cond is False.
Block this when cond is False. Return the resulting stream
Delay the stream by a given number of cycles.
Delay the stream by a given number of cycles.
Number of cycles to delay the stream
Delayed stream
Discard transactions when cond is true.
Discard transactions when cond is true.
This is the same as throwWhen() but with a semantically clearer function name. Prefer discardWhen() over throwWhen() for new designs.
Condition
The resulting Stream
Return True when a transaction occurs on the bus (valid && ready)
Return True when a transaction occurs on the bus (valid && ready)
Assert that this stream conforms to the stream semantics: https://spinalhdl.github.io/SpinalDoc-RTD/dev/SpinalHDL/Libraries/stream.html#semantics - After being asserted, valid may only be deasserted once the current payload was acknowleged.
Assert that this stream conforms to the stream semantics: https://spinalhdl.github.io/SpinalDoc-RTD/dev/SpinalHDL/Libraries/stream.html#semantics - After being asserted, valid may only be deasserted once the current payload was acknowleged.
Check that the payload does not change when valid is high and ready is low.
Assert that this stream conforms to the stream semantics: https://spinalhdl.github.io/SpinalDoc-RTD/dev/SpinalHDL/Libraries/stream.html#semantics - After being asserted, valid should be acknowledged in limited cycles.
Assert that this stream conforms to the stream semantics: https://spinalhdl.github.io/SpinalDoc-RTD/dev/SpinalHDL/Libraries/stream.html#semantics - After being asserted, valid should be acknowledged in limited cycles.
Check that the max cycles the interface would hold in stall.
Return a stream that cut all path, but divide the bandwidth by 2.
Return a stream that cut all path, but divide the bandwidth by 2.
The cost is (payload width + 2)
Stop transactions on this when cond is True.
Stop transactions on this when cond is True. Return the resulting stream
Convert into master
Convert into master
Convert into slave
Convert into slave
Return True when the bus isn't stuck with a transaction (!isStall)
Are port directions set for a Master interface?
Are port directions set for a Master interface?
Return True when a transaction has appeared (first cycle)
Are port directions set for a Master interface?
Are port directions set for a Master interface?
Return True when a transaction is present on the bus but the ready signal is low
Return a stream that cut the validpayload
Return a stream that cut the validpayload
The cost is (payload width + 1)
The name "m2s" comes from from the fact that the signals that flow
from Master-to-Slave are pipelined (namely readypayload
When true
If false
An optional signal to set the valid
When false
If false
If not null
stage()
Connect this to an clock crossing fifo and return its pop stream
Connect this to a fifo and return its pop stream
Connect this to a zero latency fifo and return its pop stream
Connect this to a register constructed fifo and return its pop stream
Connect this to a fifo and return its pop stream and its occupancy
Connect this to a cross clock domain fifo and return its pop stream and its push side occupancy
Connect this to a new stream that only advances every n elements, thus repeating the input several times.
Connect this to a new stream that only advances every n elements, thus repeating the input several times.
A tuple with the resulting stream that duplicates the items and the counter, indicating how many times the current element has been repeated.
Return a stream that cut the ready
Return a stream that cut the ready
As long as the slave is ready, the validpayloadreadyready
The cost is payload width + 1payload width
The name "s2m" comes from from the fact that the signal that flows
from Slave-to-Master is pipelined (namely valid
An optional signal to set the valid
If false
Set as master interface
Set as master interface
Set a slave interface
Set a slave interface
Connect this to a new stream whose payload is n times as wide, but that only fires every n cycles.
Connect this to a new stream whose payload is n times as wide, but that only fires every n cycles. It introduces 0 to factor-1 cycles of latency. Mapping a stream into memory and mapping a slowed down stream into memory should yield the same result, thus the elements of the input will be written from high bits to low bits.
Connect this to a valid/payload register stage and return its output stream.
Connect this to a valid/payload register stage and return its output stream.
The cost is (payload width + 1)
Equivalent to m2sPipe() but with "stage" name in the generated HDL.
Drop transaction of this when cond is False.
Drop transaction of this when cond is False. Return the resulting stream
Drop transactions of this when cond is True.
Drop transactions of this when cond is True. Return the resulting stream
Ignore the payload
Return a flow drived by this stream. Ready of ths stream is always high
Replace this stream's payload with another one
Change the payload's content type.
Change the payload's content type. The new type must have the same bit length as the current one.
(Since version ???) use setAsDirectionLess instead
Override it to define port directions for a master interface.
Override it to define port directions for a master interface.
This method must be overriden but not called. Calling this
method is not correct. Call setAsMaster() or intoMaster() instead.
This method is named asXxx but it does not return Xxx.
This method does not update isMasterInterface and isSlaveInterface.
Override it to define port directions for a master interface.
Override it to define port directions for a master interface.
If not overriden, defaults to the opposite port directions of asMaster().
This method can be overriden but not called. Calling this
method is not correct. Call setAsSlave() or intoSlave() instead.
This method is named asXxx but it does not return Xxx.
This method does not update isMasterInterface and isSlaveInterface.
(Since version ) see corresponding Javadoc for more information.
does not work with <>, use 'someBool generate Type()' or 'if(condition) Type() else null' instead