RegBase

Instance Constructors

new RegBase(name: String, addr: BigInt, doc: String, busif: BusIf, sec: Secure = null, grp: GrpTag = null)

Abstract Value Members

abstract def readGenerator(): Unit

Definition Classes
RegSlice
abstract def setName(name: String): RegBase

Concrete Value Members

final def !=(arg0: Any): Boolean

Definition Classes
AnyRef → Any
final def ##(): Int

Definition Classes
AnyRef → Any
final def ==(arg0: Any): Boolean

Definition Classes
AnyRef → Any
def NA(bc: BitCount): Bits

Attributes
protected
def RC(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
def RO(bc: BitCount): Bits

Attributes
protected
def RS(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
var Rerror: Boolean

Attributes
protected
Definition Classes
RegSlice
def W(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
def W1(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
def WB(section: Range, resetValue: BigInt, accType: AccessType): Bits

Attributes
protected
def WBP(section: Range, resetValue: BigInt, accType: AccessType): Bits

Attributes
protected
def WBR(section: Range, resetValue: BigInt, accType: AccessType): Bits

Attributes
protected
def WC(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
def WCRS(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
def WRC(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
def WRS(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
def WS(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
def WSRC(bc: BitCount, section: Range, resetValue: BigInt): Bits

Attributes
protected
def _RC[T <: BaseType](reg: T, section: Range): T

Attributes
protected
def _RO[T <: BaseType](reg: T): T

Attributes
protected
def _RS[T <: BaseType](reg: T, section: Range): T

Attributes
protected
def _W[T <: BaseType](reg: T, section: Range): T

Attributes
protected
def _W1[T <: BaseType](reg: T, section: Range): T

Attributes
protected
def _W1I[T <: BaseType](wire: T, section: Range): T

Attributes
protected
def _WB[T <: BaseType](reg: T, section: Range, accType: AccessType): T

Attributes
protected
def _WBP[T <: BaseType](reg: T, section: Range, accType: AccessType): T

Attributes
protected
def _WBR[T <: BaseType](reg: T, section: Range, accType: AccessType): T

Attributes
protected
def _WC[T <: BaseType](reg: T, section: Range): T

Attributes
protected
def _WCRS[T <: BaseType](reg: T, section: Range): T

Attributes
protected
def _WRC[T <: BaseType](reg: T, section: Range): T

Attributes
protected
def _WRS[T <: BaseType](reg: T, section: Range): T

Attributes
protected
def _WS[T <: BaseType](reg: T, section: Range): T

Attributes
protected
def _WSRC[T <: BaseType](reg: T, section: Range): T

Attributes
protected
var _name: String

Attributes
protected
Definition Classes
RegSlice
def addBlockSignal(sig: Bool): Unit

Definition Classes
RegSlice
val addr: BigInt

Definition Classes
RegSlice
def allIsNA: Boolean

Definition Classes
RegSlice
final def asInstanceOf[T0]: T0

Definition Classes
Any
val bi: BusIf

Definition Classes
RegSlice
def checkLast: Unit

Definition Classes
RegSlice
def clone(): AnyRef

Attributes
protected[java.lang]
Definition Classes
AnyRef
Annotations
@HotSpotIntrinsicCandidate() @throws( ... )
val doc: String

Definition Classes
RegSlice
def endaddr: BigInt

Definition Classes
RegSlice
final def eq(arg0: AnyRef): Boolean

Definition Classes
AnyRef
def equals(arg0: Any): Boolean

Definition Classes
AnyRef → Any
def eventR(): Bool
def eventW(): Bool
def fieldNA(bit: Int): Unit

Definition Classes
RegSlice
def fieldNA(pos: Int, bit: Int): Unit

Definition Classes
RegSlice
var fieldPtr: Int

Attributes
protected
Definition Classes
RegSlice
val fields: ListBuffer[Field]

Attributes
protected
Definition Classes
RegSlice
def getAddr(): BigInt

Definition Classes
RegSlice
final def getClass(): Class[_]

Definition Classes
AnyRef → Any
Annotations
@HotSpotIntrinsicCandidate()
def getDoc(): String

Definition Classes
RegSlice
def getFields(): List[Field]

Definition Classes
RegSlice
def getGrp: GrpTag

Definition Classes
RegSlice
def getName(): String

Definition Classes
RegSlice
def getSize(): BigInt

Definition Classes
RegSlice
def getfieldPtr: Int

Definition Classes
RegSlice
val grp: GrpTag

Definition Classes
RegSlice
def hashCode(): Int

Definition Classes
AnyRef → Any
Annotations
@HotSpotIntrinsicCandidate()
def haveWO: Boolean
val hitDoRead: Bool

Definition Classes
RegBase → RegSlice
val hitDoWrite: Bool

Definition Classes
RegBase → RegSlice
final def isInstanceOf[T0]: Boolean

Definition Classes
Any
def lowerName(): String

Definition Classes
RegSlice
val name: String

Definition Classes
RegSlice
final def ne(arg0: AnyRef): Boolean

Definition Classes
AnyRef
final def notify(): Unit

Definition Classes
AnyRef
Annotations
@HotSpotIntrinsicCandidate()
final def notifyAll(): Unit

Definition Classes
AnyRef
Annotations
@HotSpotIntrinsicCandidate()
def rdSecureError(err: Bool): Bool

Definition Classes
RegSlice
def rdSecurePassage(rdbits: Bits): Bits

Definition Classes
RegSlice
def rdSecurePassage(access: Bool): Bool

Definition Classes
RegSlice
def rdata(): Bits

Attributes
protected
Definition Classes
RegSlice
def readBits(): Bits

Definition Classes
RegBase → RegSlice
def readErrorTag: Boolean
def readValid(): Bool

Definition Classes
RegSlice
val regType: String

Definition Classes
RegSlice
val reuseTag: ReuseTag

Definition Classes
RegSlice
lazy val secureLogic: (Option[Bool], Option[Bool])

Definition Classes
RegSlice
val size: BigInt

Definition Classes
RegSlice
final def synchronized[T0](arg0: ⇒ T0): T0

Definition Classes
AnyRef
def toString(): String

Definition Classes
RegSlice → AnyRef → Any
var updateReadBits: Bits

Definition Classes
RegSlice
def upperName(): String

Definition Classes
RegSlice
final def wait(arg0: Long, arg1: Int): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
final def wait(arg0: Long): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
final def wait(): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
def wrErrorGenerator(): Unit

Definition Classes
RegSlice
def wrSecureError(): Bool

Definition Classes
RegSlice
def wrSecurePassage(wrbits: Bits): Bits

Definition Classes
RegSlice
def wrSecurePassage(access: Bool): Bool

Definition Classes
RegSlice

Deprecated Value Members

def finalize(): Unit

Attributes
protected[java.lang]
Definition Classes
AnyRef
Annotations
@Deprecated @deprecated @throws( classOf[java.lang.Throwable] )
Deprecated
(Since version ) see corresponding Javadoc for more information.

Related Doc: package regif

abstract class RegBase extends RegSlice

Instance Constructors

new RegBase(name: String, addr: BigInt, doc: String, busif: BusIf, sec: Secure = null, grp: GrpTag = null)

Abstract Value Members

abstract def readGenerator(): Unit

abstract def setName(name: String): RegBase

Concrete Value Members

final def !=(arg0: Any): Boolean

final def ##(): Int

final def ==(arg0: Any): Boolean

def NA(bc: BitCount): Bits

def RC(bc: BitCount, section: Range, resetValue: BigInt): Bits

def RO(bc: BitCount): Bits

def RS(bc: BitCount, section: Range, resetValue: BigInt): Bits

var Rerror: Boolean

def W(bc: BitCount, section: Range, resetValue: BigInt): Bits

def W1(bc: BitCount, section: Range, resetValue: BigInt): Bits

def WB(section: Range, resetValue: BigInt, accType: AccessType): Bits

def WBP(section: Range, resetValue: BigInt, accType: AccessType): Bits

def WBR(section: Range, resetValue: BigInt, accType: AccessType): Bits

def WC(bc: BitCount, section: Range, resetValue: BigInt): Bits

def WCRS(bc: BitCount, section: Range, resetValue: BigInt): Bits

def WRC(bc: BitCount, section: Range, resetValue: BigInt): Bits

def WRS(bc: BitCount, section: Range, resetValue: BigInt): Bits

def WS(bc: BitCount, section: Range, resetValue: BigInt): Bits

def WSRC(bc: BitCount, section: Range, resetValue: BigInt): Bits

def _RC[T <: BaseType](reg: T, section: Range): T

def _RO[T <: BaseType](reg: T): T

def _RS[T <: BaseType](reg: T, section: Range): T

def _W[T <: BaseType](reg: T, section: Range): T

def _W1[T <: BaseType](reg: T, section: Range): T

def _W1I[T <: BaseType](wire: T, section: Range): T

def _WB[T <: BaseType](reg: T, section: Range, accType: AccessType): T

def _WBP[T <: BaseType](reg: T, section: Range, accType: AccessType): T

def _WBR[T <: BaseType](reg: T, section: Range, accType: AccessType): T

def _WC[T <: BaseType](reg: T, section: Range): T

def _WCRS[T <: BaseType](reg: T, section: Range): T

def _WRC[T <: BaseType](reg: T, section: Range): T

def _WRS[T <: BaseType](reg: T, section: Range): T

def _WS[T <: BaseType](reg: T, section: Range): T

def _WSRC[T <: BaseType](reg: T, section: Range): T

var _name: String

def addBlockSignal(sig: Bool): Unit

val addr: BigInt

def allIsNA: Boolean

final def asInstanceOf[T0]: T0

val bi: BusIf

def checkLast: Unit

def clone(): AnyRef

val doc: String

def endaddr: BigInt

final def eq(arg0: AnyRef): Boolean

def equals(arg0: Any): Boolean

def eventR(): Bool

def eventW(): Bool

def fieldNA(bit: Int): Unit

def fieldNA(pos: Int, bit: Int): Unit

var fieldPtr: Int

val fields: ListBuffer[Field]

def getAddr(): BigInt

final def getClass(): Class[_]

def getDoc(): String

def getFields(): List[Field]

def getGrp: GrpTag

def getName(): String

def getSize(): BigInt

def getfieldPtr: Int

val grp: GrpTag

def hashCode(): Int

def haveWO: Boolean

val hitDoRead: Bool

val hitDoWrite: Bool

final def isInstanceOf[T0]: Boolean

def lowerName(): String

val name: String

final def ne(arg0: AnyRef): Boolean

final def notify(): Unit

final def notifyAll(): Unit