Connect that to this.
Connect that to this. The valid/payload/ready path are cut by an register stage
Connect that to this.
Connect that to this. The valid/payload path are cut by an register stage
Connect that to this.
Connect that to this. The ready path is cut by an register stage
Connect that to this
Connect this to that.
Connect this to that. The valid/payload path are cut by an register stage
Connect that to this.
Connect that to this. The valid/payload/ready path are cut by an register stage
Connect this to that.
Connect this to that. The ready path is cut by an register stage
Connect this to that
Like addFragmentLast(Bool), but instead of manually telling which values go together, let a counter do the job.
Like addFragmentLast(Bool), but instead of manually telling which values go together, let a counter do the job. The counter will increment for each passing element. Last will be set high at the end of each revolution.
outStream = inStream.addFragmentLast(new Counter(5))
Convert this stream to a fragmented stream by adding a last bit.
Convert this stream to a fragmented stream by adding a last bit. To view it from another perspective, bundle together successive events as fragments of a larger whole. You can then use enhanced operations on fragmented streams, like reducing of elements.
Drive arbitration signals of this from that
A combinatorial stage doesn't do anything, but it is nice to separate signals for combinatorial transformations.
Block this when cond is False.
Block this when cond is False. Return the resulting stream
Return True when a transaction occurs on the bus (valid && ready)
Return True when a transaction occurs on the bus (valid && ready)
cut all path, but divide the bandwidth by 2, 1 cycle latency
Stop transactions on this when cond is True.
Stop transactions on this when cond is True. Return the resulting stream
Return True when the bus is ready, but no data is present
Return True when a transaction has appeared (first cycle)
Return True when a transaction is present on the bus but the ready signal is low
Connect this to an clock crossing fifo and return its pop stream
Connect this to a fifo and return its pop stream
Connect this to a zero latency fifo and return its pop stream
Connect this to a fifo and return its pop stream and its occupancy
Connect this to a cross clock domain fifo and return its pop stream and its push side occupancy
Connect this to a new stream that only advances every n elements, thus repeating the input several times.
Connect this to a new stream that only advances every n elements, thus repeating the input several times.
A tuple with the resulting stream that duplicates the items and the counter, indicating how many times the current element has been repeated.
Connect this to a new stream whose payload is n times as wide, but that only fires every n cycles.
Connect this to a new stream whose payload is n times as wide, but that only fires every n cycles. It introduces 0 to factor-1 cycles of latency. Mapping a stream into memory and mapping a slowed down stream into memory should yield the same result, thus the elements of the input will be written from high bits to low bits.
Connect this to a valid/payload register stage and return its output stream
Drop transaction of this when cond is False.
Drop transaction of this when cond is False. Return the resulting stream
Drop transactions of this when cond is True.
Drop transactions of this when cond is True. Return the resulting stream
Ignore the payload
Return a flow drived by this stream. Ready of ths stream is always high
Replace this stream's payload with another one
Change the payload's content type.
Change the payload's content type. The new type must have the same bit length as the current one.
(Since version ???) use setAsDirectionLess instead
(Since version ) see corresponding Javadoc for more information.