abstract
class
DmaSgTesterCtrl extends AnyRef
Instance Constructors
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new
DmaSgTesterCtrl(clockDomain: ClockDomain)
Abstract Value Members
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abstract
def
ctrlReadHal(address: BigInt): BigInt
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abstract
def
ctrlWriteHal(data: BigInt, address: BigInt): Unit
Concrete Value Members
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final
def
!=(arg0: Any): Boolean
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final
def
##(): Int
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final
def
==(arg0: Any): Boolean
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final
def
asInstanceOf[T0]: T0
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def
channelBusy(channel: Int): Boolean
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def
channelConfig(channel: Int, fifoBase: Int, fifoBytes: Int, priority: Int, weight: Int): Unit
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def
channelInterruptConfigure(channel: Int, mask: Int): Unit
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def
channelPopMemory(channel: Int, address: BigInt, bytePerBurst: Int): Unit
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def
channelPopStream(channel: Int, portId: Int, sourceId: Int, sinkId: Int, withLast: Boolean): Unit
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def
channelProgress(channel: Int): Int
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def
channelPushMemory(channel: Int, address: BigInt, bytePerBurst: Int): Unit
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def
channelPushStream(channel: Int, portId: Int, sourceId: Int, sinkId: Int, completionOnPacket: Boolean = false): Unit
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def
channelSgBusy(channel: Int): Boolean
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def
channelStart(channel: Int, bytes: BigInt, selfRestart: Boolean): Unit
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def
channelStartAndWait(channel: Int, bytes: BigInt): Unit
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def
channelStartSg(channel: Int, head: Long): Unit
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def
channelStop(channel: Int): Unit
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def
channelToAddress(channel: Int): Int
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def
channelWaitCompletion(channel: Int): Unit
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def
channelWaitSgDone(channel: Int): Unit
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def
clone(): AnyRef
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def
ctrlRead(address: BigInt): BigInt
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def
ctrlWrite(data: BigInt, address: BigInt): Unit
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final
def
eq(arg0: AnyRef): Boolean
-
def
equals(arg0: Any): Boolean
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final
def
getClass(): Class[_]
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def
hashCode(): Int
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final
def
isInstanceOf[T0]: Boolean
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val
mutex: SimMutex
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final
def
ne(arg0: AnyRef): Boolean
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final
def
notify(): Unit
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final
def
notifyAll(): Unit
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final
def
synchronized[T0](arg0: ⇒ T0): T0
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def
toString(): String
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final
def
wait(arg0: Long, arg1: Int): Unit
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final
def
wait(arg0: Long): Unit
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final
def
wait(): Unit
Deprecated Value Members
-
def
finalize(): Unit
Inherited from AnyRef
Inherited from Any