de.sciss.synth.ugen

FSinOsc

object FSinOsc extends Serializable

A sine oscillator UGen using a fast approximation. It uses a ringing filter and is less CPU expensive than SinOsc . However, the amplitude of the wave will vary with frequency. Generally the amplitude will go down when the frequency rises and it will go up as if the frequency is lowered.

Warning: In the current implementation, the amplitude can blow up if the frequency is modulated by certain alternating signals (e.g. abruptly by TRand ).

Examples
// plain oscillator
play { FSinOsc.ar(441) * 0.2 }
See also

SinOscFB

SinOsc

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  6. def ar(freq: GE = 440.0f, iphase: GE = 0.0f): FSinOsc

    freq

    frequency in Hertz

    iphase

    initial phase of the oscillator in radians. This cannot be modulated. A value of 0.5 Pi means the output starts at +1. A value of 1.5 Pi means the output starts at -1, (init-time only)

  7. def ar: FSinOsc

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  16. def kr(freq: GE = 440.0f, iphase: GE = 0.0f): FSinOsc

    freq

    frequency in Hertz

    iphase

    initial phase of the oscillator in radians. This cannot be modulated. A value of 0.5 Pi means the output starts at +1. A value of 1.5 Pi means the output starts at -1, (init-time only)

  17. def kr: FSinOsc

  18. final def ne(arg0: AnyRef): Boolean

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