Class/Object

chisel3.iotesters

OrderedDecoupledHWIOTester

Related Docs: object OrderedDecoupledHWIOTester | package iotesters

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abstract class OrderedDecoupledHWIOTester extends HWIOTester

Base class supports implementation of test circuits of modules that use Decoupled inputs and either Decoupled or Valid outputs Multiple decoupled inputs are supported. Testers that subclass this will be strictly ordered. Input will flow into their devices asynchronously but in order they were generated be compared in the order they are generated

Source
OrderedDecoupledHWIOTester.scala
Example:
  1. class XTimesXTester extends [[OrderedDecoupledHWIOTester]] {
      val device_under_test = new XTimesY
      test_block {
        for {
          i <- 0 to 10
          j <- 0 to 10
        } {
          input_event(device_under_test.io.in.x -> i, device_under_test.in.y -> j)
          output_event(device_under_test.io.out.z -> i*j)
        }
      }
    }

    an input event is a series of values that will be gated into the decoupled input interface at the same time an output event is a series of values that will be tested at the same time independent small state machines are set up for input and output interface all inputs regardless of interfaces are submitted to the device under test in the order in which they were created likewise, all outputs regardless of which interface are tested in the same order that they were created

Linear Supertypes
HWIOTester, BasicTester, LegacyModule, MultiIOModule, RawModule, BaseModule, HasId, internal.InstanceId, AnyRef, Any
Type Hierarchy
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. OrderedDecoupledHWIOTester
  2. HWIOTester
  3. BasicTester
  4. LegacyModule
  5. MultiIOModule
  6. RawModule
  7. BaseModule
  8. HasId
  9. InstanceId
  10. AnyRef
  11. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new OrderedDecoupledHWIOTester()

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Type Members

  1. class GlobalEventCounter extends AnyRef

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  2. case class TestingEvent(port_values: Map[Data, BigInt], event_number: Int) extends Product with Serializable

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Abstract Value Members

  1. abstract val device_under_test: Module

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    Definition Classes
    HWIOTester

Concrete Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: T): T

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    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data): Unit

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    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _compatAutoWrapPorts(): Unit

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    Definition Classes
    BaseModule
  8. def _compatIoPortBound(): Boolean

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    Attributes
    protected
    Definition Classes
    LegacyModule
  9. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any
  10. def checkAndGetCommonDecoupledOrValidParentPort(pokes: Seq[(Data, BigInt)], must_be_decoupled: Boolean = true, event_number: Int): Either[DecoupledIO[Data], ValidIO[Data]]

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    Validate that all pokes ports are members of the same DecoupledIO makes a list of all decoupled parents based on the ports referenced in pokes

  11. def circuitName: String

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    Attributes
    protected
    Definition Classes
    HasId
  12. val clock: Clock

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    Definition Classes
    MultiIOModule
  13. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  14. val compileOptions: CompileOptions

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    Definition Classes
    RawModule
  15. val control_port_to_input_values: HashMap[DecoupledIO[Data], ArrayBuffer[TestingEvent]]

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  16. val decoupled_control_port_to_output_values: HashMap[DecoupledIO[Data], ArrayBuffer[TestingEvent]]

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  17. def desiredName: String

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    Definition Classes
    BaseModule
  18. var enable_all_debug: Boolean

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    Definition Classes
    HWIOTester
  19. var enable_printf_debug: Boolean

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    Definition Classes
    HWIOTester
  20. var enable_scala_debug: Boolean

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    Definition Classes
    HWIOTester
  21. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  22. def equals(that: Any): Boolean

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    Definition Classes
    HasId → AnyRef → Any
  23. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  24. def finish(): Unit

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    this builds a circuit to load inputs and circuits to test outputs that are controlled by either a decoupled or valid

    this builds a circuit to load inputs and circuits to test outputs that are controlled by either a decoupled or valid

    Definition Classes
    OrderedDecoupledHWIOTesterHWIOTester → BasicTester
  25. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any
  26. def getCommands: Seq[Command]

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    Attributes
    protected
    Definition Classes
    RawModule
  27. def getCommonValidParentPort(expects: Seq[(Data, BigInt)], event_number: Int): Either[DecoupledIO[Data], ValidIO[Data]]

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    Validate that all pokes ports are members of the same DecoupledIO or ValidIO makes a list of all decoupled parents based on the ports referenced in pokes

  28. def getIds: Seq[HasId]

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    Attributes
    protected
    Definition Classes
    BaseModule
  29. def getModulePorts: Seq[Data]

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    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  30. lazy val getPorts: Seq[Port]

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    Definition Classes
    RawModule
  31. def hashCode(): Int

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    Definition Classes
    HasId → AnyRef → Any
  32. def inputEvent(pokes: (Data, BigInt)*): Unit

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  33. val input_event_list: ArrayBuffer[Seq[(Data, BigInt)]]

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  34. def instanceName: String

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    Definition Classes
    BaseModule → HasId → InstanceId
  35. val io: Bundle

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    Definition Classes
    BasicTester → LegacyModule
  36. var io_info: IOAccessor

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    Definition Classes
    HWIOTester
  37. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any
  38. def logPrintfDebug(fmt: String, args: Bits*): Unit

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    Definition Classes
    HWIOTester
  39. def logScalaDebug(msg: ⇒ String): Unit

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    Definition Classes
    HWIOTester
  40. final lazy val name: String

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    Definition Classes
    BaseModule
  41. def nameIds(rootClass: Class[_]): HashMap[HasId, String]

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    Attributes
    protected
    Definition Classes
    LegacyModule → BaseModule
  42. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  43. final def notify(): Unit

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    Definition Classes
    AnyRef
  44. final def notifyAll(): Unit

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    Definition Classes
    AnyRef
  45. def outputEvent(expects: (Data, BigInt)*): Unit

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  46. val output_event_list: ArrayBuffer[Seq[(Data, BigInt)]]

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  47. var override_clock: Option[Clock]

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    Attributes
    protected
    Definition Classes
    LegacyModule
  48. var override_reset: Option[Bool]

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    Attributes
    protected
    Definition Classes
    LegacyModule
  49. def parentModName: String

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    Definition Classes
    HasId → InstanceId
  50. def parentPathName: String

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    Definition Classes
    HasId → InstanceId
  51. def pathName: String

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    Definition Classes
    HasId → InstanceId
  52. def popCount(n: Long): Int

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    Definition Classes
    BasicTester
  53. val port_to_decoupled: HashMap[Data, DecoupledIO[Data]]

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  54. val port_to_valid: HashMap[Data, ValidIO[Data]]

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  55. def portsContains(elem: Data): Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule
  56. def portsSize: Int

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    Attributes
    protected
    Definition Classes
    BaseModule
  57. def processInputEvents(): Unit

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    iterate over recorded events, checking constraints on ports referenced, etc.

    iterate over recorded events, checking constraints on ports referenced, etc. use poke and expect to record

  58. def processOutputEvents(): Unit

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  59. val reset: Reset

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    Definition Classes
    MultiIOModule
  60. val rnd: Random.type

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    Definition Classes
    HWIOTester
  61. def stop()(implicit sourceInfo: SourceInfo): Unit

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    Definition Classes
    BasicTester
  62. def suggestName(name: ⇒ String): OrderedDecoupledHWIOTester.this.type

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    Definition Classes
    HasId
  63. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef
  64. final def toAbsoluteTarget: IsModule

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    Definition Classes
    BaseModule → InstanceId
  65. def toString(): String

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    Definition Classes
    AnyRef → Any
  66. final def toTarget: ModuleTarget

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    Definition Classes
    BaseModule → InstanceId
  67. val valid_control_port_to_output_values: HashMap[ValidIO[Data], ArrayBuffer[TestingEvent]]

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  68. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  69. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  70. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Deprecated Value Members

  1. final def toNamed: ModuleName

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    Definition Classes
    BaseModule → InstanceId
    Annotations
    @deprecated
    Deprecated

    (Since version 3.2) toNamed API is deprecated -- use toTarget instead

Inherited from HWIOTester

Inherited from BasicTester

Inherited from LegacyModule

Inherited from MultiIOModule

Inherited from RawModule

Inherited from BaseModule

Inherited from HasId

Inherited from internal.InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped