Class

Chisel

CompatibilityModule

Related Doc: package Chisel

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abstract class CompatibilityModule extends LegacyModule

Linear Supertypes
LegacyModule, ImplicitModule, UserModule, BaseModule, HasId, InstanceId, AnyRef, Any
Type Hierarchy
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. CompatibilityModule
  2. LegacyModule
  3. ImplicitModule
  4. UserModule
  5. BaseModule
  6. HasId
  7. InstanceId
  8. AnyRef
  9. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new CompatibilityModule(_clock: Clock, _reset: Bool)(implicit moduleCompileOptions: CompileOptions)

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  2. new CompatibilityModule(_reset: Bool)(implicit moduleCompileOptions: CompileOptions)

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  3. new CompatibilityModule(_clock: Clock)(implicit moduleCompileOptions: CompileOptions)

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  4. new CompatibilityModule(override_clock: Option[Clock] = None, override_reset: Option[Bool] = None)(implicit moduleCompileOptions: CompileOptions)

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  5. new CompatibilityModule()(implicit moduleCompileOptions: CompileOptions)

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Abstract Value Members

  1. abstract def io: chisel3.core.Record

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    Definition Classes
    LegacyModule

Concrete Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any

  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  4. def IO[T <: chisel3.core.Data](iodef: T): T

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    Attributes
    protected
    Definition Classes
    BaseModule

  5. def _bindIoInPlace(iodef: chisel3.core.Data): Unit

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    Attributes
    protected
    Definition Classes
    BaseModule

  6. var _closed: Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule

  7. def _compatAutoWrapPorts(): Unit

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    Definition Classes
    CompatibilityModule → BaseModule

  8. def _compatIoPortBound(): Boolean

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    Attributes
    protected
    Definition Classes
    LegacyModule

  9. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any

  10. def circuitName: String

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    Attributes
    protected
    Definition Classes
    HasId

  11. val clock: chisel3.core.Clock

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    Definition Classes
    ImplicitModule

  12. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  13. val compileOptions: CompileOptions

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    Definition Classes
    UserModule

  14. def desiredName: String

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    Definition Classes
    BaseModule

  15. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  16. def equals(that: Any): Boolean

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    Definition Classes
    HasId → AnyRef → Any

  17. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )

  18. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any

  19. def getCommands: Seq[Command]

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    Attributes
    protected
    Definition Classes
    UserModule

  20. def getIds: Seq[HasId]

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    Attributes
    protected
    Definition Classes
    BaseModule

  21. def getModulePorts: Seq[chisel3.core.Data]

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    Attributes
    protected
    Definition Classes
    BaseModule

  22. lazy val getPorts: Seq[Port]

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    Definition Classes
    UserModule

  23. def hashCode(): Int

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    Definition Classes
    HasId → AnyRef → Any

  24. def instanceName: String

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    Definition Classes
    BaseModule → HasId → InstanceId

  25. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any

  26. final val name: String

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    Definition Classes
    BaseModule

  27. def nameIds(rootClass: Class[_]): HashMap[HasId, String]

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    Attributes
    protected
    Definition Classes
    LegacyModule → BaseModule

  28. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  29. final def notify(): Unit

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    Definition Classes
    AnyRef

  30. final def notifyAll(): Unit

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    Definition Classes
    AnyRef

  31. var override_clock: Option[chisel3.core.Clock]

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    Attributes
    protected
    Definition Classes
    LegacyModule

  32. var override_reset: Option[chisel3.core.Bool]

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    Attributes
    protected
    Definition Classes
    LegacyModule

  33. def parentModName: String

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    Definition Classes
    HasId → InstanceId

  34. def parentPathName: String

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    Definition Classes
    HasId → InstanceId

  35. def pathName: String

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    Definition Classes
    HasId → InstanceId

  36. def portsContains(elem: chisel3.core.Data): Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule

  37. def portsSize: Int

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    Attributes
    protected
    Definition Classes
    BaseModule

  38. val reset: chisel3.core.Reset

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    Definition Classes
    ImplicitModule

  39. def suggestName(name: ⇒ String): CompatibilityModule.this.type

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    Definition Classes
    HasId

  40. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef

  41. final def toNamed: ModuleName

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    Definition Classes
    BaseModule → InstanceId

  42. def toString(): String

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    Definition Classes
    AnyRef → Any

  43. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  44. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  45. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Deprecated Value Members

  1. def annotate(annotation: ChiselAnnotation): Unit

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    Attributes
    protected
    Definition Classes
    BaseModule
    Annotations
    @deprecated
    Deprecated

    (Since version 3.1) Use chisel3.experimental.annotate instead

Inherited from LegacyModule

Inherited from ImplicitModule

Inherited from UserModule

Inherited from BaseModule

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped