MemAccess

abstract def cond: Node

abstract def getPortType: String

final def !=(arg0: AnyRef): Boolean

final def !=(arg0: Any): Boolean

def ##(b: Node): Node

final def ##(): Int

def <>(src: Node): Unit

final def ==(arg0: AnyRef): Boolean

final def ==(arg0: Any): Boolean

def W0Wtransform(): Unit

def ^^(src: Node): Unit

val _id: Int

def _isComplementOf(x: Node): Boolean

def addConsumers(): Unit

def addr: Node

final def asInstanceOf[T0]: T0

def assign(src: Node): Unit

def canCSE: Boolean

lazy val chiselName: String

var clock: Clock

def clone(): AnyRef

var cntrIdx: Int

var component: Module

def componentOf: Module

val consumers: LinkedHashSet[Node]

def dblLitValue: Double

var depth: Int

var driveRand: Boolean

lazy val emitIndex: Int

final def eq(arg0: AnyRef): Boolean

def equals(that: Any): Boolean

def equalsForCSE(x: Node): Boolean

def extract(b: Bundle): List[Node]

def extract(widths: Array[Int]): List[UInt]

def finalize(): Unit

def floLitValue: Float

def forceMatchingWidths: Unit

final def getClass(): Class[_]

def getLit: Literal

def getNode: Node

def getWidth(): Int

def getWidthW(): Width

def hashCode(): Int

def hashCodeForCSE: Int

def infer: Boolean

var inferWidth: (⇒ Node) ⇒ Width

def init(n: String, w: Int, ins: Node*): Node

def init(n: String, widthFunc: (⇒ Node) ⇒ Width, ins: Node*): Node

def initOf(n: String, widthfunc: (⇒ Node) ⇒ Width, ins: Iterable[Node]): Node

val inputs: ArrayBuffer[Node]

def isByValue: Boolean

lazy val isInObject: Boolean

lazy val isInVCD: Boolean

final def isInstanceOf[T0]: Boolean

def isIo: Boolean

def isIo_=(isIo: Boolean): Unit

def isKnownWidth: Boolean

final def isLit: Boolean

def isReg: Boolean

def isTopLevelIO: Boolean

var isTypeNode: Boolean

def isUsedByClockHi: Boolean

var isWidthWalked: Boolean

val line: StackTraceElement

def litOf: Literal

def litValue(default: BigInt = BigInt(-1)): BigInt

def matchWidth(w: Width): Node

def maybeFlatten: Seq[Node]

val mem: Mem[_]

var modified: Boolean

var name: String

var nameHolder: nameable

def nameIt(path: String, isNamingIo: Boolean): Unit

var named: Boolean

_named_ is used to indicates name was set explicitely and should not be overriden by a _nameIt_ generator.

final def ne(arg0: AnyRef): Boolean

def needWidth(): Int

final def notify(): Unit

final def notifyAll(): Unit

def printTree(writer: PrintStream, depth: Int = 4, indent: String = ""): Unit

Prints all members of a node and recursively its inputs up to a certain depth level.

var prune: Boolean

var referenced: Boolean

def removeTypeNodes(): Unit

def replaceTree(newNode: Node): Unit

def review(): Unit

var sccIndex: Int

var sccLowlink: Int

def setName(n: String): Unit

def setWidth(w: Int): Unit

final def synchronized[T0](arg0: ⇒ T0): T0

def toBits(): UInt

def toNode: Node

def toString(): String

def used: Boolean

def usesInClockHi(i: Node): Boolean

final def wait(): Unit

final def wait(arg0: Long, arg1: Int): Unit

final def wait(arg0: Long): Unit

var width_: Width