Chisel

Chisel

Chisel

Chisel

Chisel

Chisel

Chisel

Chisel

Chisel

Chisel

SInt

Dbl Flo

Module

Module

Node

Module

CounterBackend

ManualTester

CounterBackend

Module

CounterWrapperIO MemAccess MemSeqRead ROMRead VecProc

MemSeqRead

CounterConfiguration

Backend

Bits Chisel

ACos ASin ATan ArbiterCtrl BinaryBoolOp BinaryOp Binding Bits Bool Bundle CString Cat Ceil Concatenate Cos Counter Data Dbl Decoupled Enum Extract Fill FillInterleaved Flo Floor IntParam LFSR16 ListLookup Lit Literal Log Log2 LogicalOp Lookup Mem Module isValName Multiplex Mux Mux1H MuxCase MuxLookup NodeExtract NodeFill OHToUInt Op Pipe PopCount Pow Printer PriorityEncoder PriorityEncoderOH PriorityMux Queue ReductionOp Reg RegEnable RegInit RegNext Reverse Round SInt Scanner ShiftRegister Sin Sqrt Tan UInt UIntToOH UnaryOp Valid Vec VecLike VecMux VecUIntToOH andR bfs chiselCast chiselMain chiselMainTest foldR is isLessThan isPow2 log2Down log2Up nodeToString orR sort switch throwException unless when xorR SFix UFix

FameQueueTracker

Printf PrintfBase TestIO

Bits Bundle Data Vec

Bits Bundle Data Vec

Bits Bundle Data Vec

Bits

Backend

Dbl Flo

AsyncFifo

Module

Module

Bits Node Reg

Backend

Reg

Dbl Flo