_chiselMain_ behaves as if it constructs an execution tree from
the constructor of a sub class of Module which is passed as a parameter.
That execution tree is simplified by aggregating all calls which are not
constructors of a Module instance into the parent which is.
The simplified tree (encoded through _Driver.children_) forms the basis
of the generated verilog. Each node in the simplified execution tree is
a _Module_ instance from which a verilog module is textually derived.
As an optimization, _Backend_ classes output modules which are
textually equivalent only once and update a _Module_ instance's
_moduleName_ accordingly.
_chiselMain_ behaves as if it constructs an execution tree from the constructor of a sub class of Module which is passed as a parameter. That execution tree is simplified by aggregating all calls which are not constructors of a Module instance into the parent which is. The simplified tree (encoded through _Driver.children_) forms the basis of the generated verilog. Each node in the simplified execution tree is a _Module_ instance from which a verilog module is textually derived. As an optimization, _Backend_ classes output modules which are textually equivalent only once and update a _Module_ instance's _moduleName_ accordingly.