DiagrammerState creates a diagram of a firrtl circuit. The firrtl circuit can be in any one of the following
forms
ChiselGeneratorAnnotation(() => new DUT()) a chisel DUT that is used to generate firrtl
FirrtlFileAnnotation(fileName) a file name that contains firrtl source
FirrtlSourceAnnotation in-line firrtl source
Linear Supertypes
Stage, Phase, DependencyAPI[Phase], TransformLike[AnnotationSeq], LazyLogging, AnyRef, Any
DiagrammerState creates a diagram of a firrtl circuit. The firrtl circuit can be in any one of the following forms ChiselGeneratorAnnotation(() => new DUT()) a chisel DUT that is used to generate firrtl FirrtlFileAnnotation(fileName) a file name that contains firrtl source FirrtlSourceAnnotation in-line firrtl source