Class

firrtl_interpreter.Memory

ReadWritePort

Related Doc: package Memory

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case class ReadWritePort(portName: String) extends MemoryPort with Product with Serializable

Source
Memory.scala
Linear Supertypes
Serializable, Serializable, Product, Equals, MemoryPort, AnyRef, Any
Type Hierarchy
Ordering
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  2. By Inheritance
Inherited
  1. ReadWritePort
  2. Serializable
  3. Serializable
  4. Product
  5. Equals
  6. MemoryPort
  7. AnyRef
  8. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new ReadWritePort(portName: String)

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Type Members

  1. case class ReadPipeLineElement(readPipeLineData: Concrete) extends Product with Serializable

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  2. case class WritePipeLineElement(enable: Boolean, address: Int, data: Concrete, mask: Concrete) extends Product with Serializable

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Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any

  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  4. var address: Int

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    Definition Classes
    MemoryPort

  5. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any

  6. var clock: Int

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    Definition Classes
    MemoryPort

  7. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  8. def cycle(): Unit

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  9. var data: Concrete

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    Definition Classes
    MemoryPort

  10. var enable: Boolean

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    Definition Classes
    MemoryPort

  11. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  12. val fieldDependencies: Seq[String]

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    Definition Classes
    ReadWritePort → MemoryPort

  13. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )

  14. val fullName: String

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    Definition Classes
    MemoryPort

  15. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any

  16. def getValue(fieldName: String): Concrete

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    Definition Classes
    ReadWritePort → MemoryPort

  17. def inputHasChanged(): Unit

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  18. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any

  19. val latency: Int

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    Definition Classes
    ReadWritePort → MemoryPort

  20. var mask: Concrete

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  21. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  22. final def notify(): Unit

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    Definition Classes
    AnyRef

  23. final def notifyAll(): Unit

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    Definition Classes
    AnyRef

  24. val outputFieldName: String

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    Definition Classes
    ReadWritePort → MemoryPort

  25. val portName: String

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    Definition Classes
    ReadWritePort → MemoryPort

  26. var readData: Concrete

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  27. val readPipeLine: ArrayBuffer[ReadPipeLineElement]

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  28. def setValue(fieldName: String, concreteValue: Concrete): Unit

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    Definition Classes
    ReadWritePort → MemoryPort

  29. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef

  30. def toString(): String

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    Definition Classes
    ReadWritePort → AnyRef → Any

  31. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  32. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  33. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  34. def writeElementFromSnapshot: WritePipeLineElement

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  35. var writeMode: Boolean

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  36. val writePipeLine: ArrayBuffer[WritePipeLineElement]

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Inherited from Serializable

Inherited from Serializable

Inherited from Product

Inherited from Equals

Inherited from MemoryPort

Inherited from AnyRef

Inherited from Any

Ungrouped