Parser

Value Members

1. final def !=(arg0: Any): Boolean

   

   Definition Classes

   AnyRef → Any

2. final def ##(): Int

   

   Definition Classes

   AnyRef → Any

3. final def ==(arg0: Any): Boolean

   

   Definition Classes

   AnyRef → Any

4. object IgnoreInfo extends InfoMode with Product with Serializable

   

5. object UseInfo extends InfoMode with Product with Serializable

   

6. final def asInstanceOf[T0]: T0

   

   Definition Classes

   Any

7. def clone(): AnyRef

   

   Attributes

   protected[java.lang]

   Definition Classes

   AnyRef

   Annotations

   @throws( ... )

8. final def eq(arg0: AnyRef): Boolean

   

   Definition Classes

   AnyRef

9. def equals(arg0: Any): Boolean

   

   Definition Classes

   AnyRef → Any

10. def finalize(): Unit

    

    Attributes

    protected[java.lang]

    Definition Classes

    AnyRef

    Annotations

    @throws( classOf[java.lang.Throwable] )

11. final def getClass(): Class[_]

    

    Definition Classes

    AnyRef → Any

12. def hashCode(): Int

    

    Definition Classes

    AnyRef → Any

13. final def isInstanceOf[T0]: Boolean

    

    Definition Classes

    Any

14. val logger: Logger

    

    Attributes

    protected

    Definition Classes

    LazyLogging

15. final def ne(arg0: AnyRef): Boolean

    

    Definition Classes

    AnyRef

16. final def notify(): Unit

    

    Definition Classes

    AnyRef

17. final def notifyAll(): Unit

    

    Definition Classes

    AnyRef

18. def parse(text: String, infoMode: InfoMode): Circuit

    

19. def parse(lines: Seq[String], infoMode: InfoMode): Circuit

    

20. def parse(text: String): Circuit

    

    Parse the concrete syntax of a FIRRTL firrtl.ir.Circuit, e.g.

    Parse the concrete syntax of a FIRRTL firrtl.ir.Circuit, e.g.

    """circuit Top:
      |  module Top:
      |    input x: UInt
      |    node y = x
      |""".stripMargin

    becomes:

    Circuit(
      NoInfo,
      Seq(Module(
        NoInfo,
        "Top",
        Seq(Port(NoInfo, "x", Input, UIntType(UnknownWidth))),
        Block(DefNode(NoInfo, "y", Ref("x", UnknownType)))
      )),
      "Top"
    )

    text

    concrete Circuit syntax

21. def parse(lines: Seq[String]): Circuit

    

22. def parse(lines: Iterator[String], infoMode: InfoMode = UseInfo): Circuit

    

    Takes Iterator over lines of FIRRTL, returns FirrtlNode (root node is Circuit)

23. def parseCharStream(charStream: CharStream, infoMode: InfoMode): Circuit

    

    Parses a org.antlr.v4.runtime.CharStream and returns a parsed Circuit

24. def parseDefModule(module: String): DefModule

    

    Parse the concrete syntax of a FIRRTL firrtl.ir.DefModule, e.g.

    Parse the concrete syntax of a FIRRTL firrtl.ir.DefModule, e.g.

    """module Top:
      |  input x: UInt
      |  node y = x
      |""".stripMargin

    becomes:

    Module(
      NoInfo,
      "Top",
      Seq(Port(NoInfo, "x", Input, UIntType(UnknownWidth))),
      Block(DefNode(NoInfo, "y", Ref("x", UnknownType)))
    )

    module

    concrete DefModule syntax

25. def parseExpression(expr: String): Expression

    

    Parse the concrete syntax of a FIRRTL firrtl.ir.Expression, e.g.

    Parse the concrete syntax of a FIRRTL firrtl.ir.Expression, e.g. "add(x, y)" becomes:

    DoPrim(Add, Seq(Ref("x", UnknownType), Ref("y", UnknownType), Nil, UnknownType)

    expr

    concrete Expression syntax

26. def parseFile(filename: String, infoMode: InfoMode): Circuit

    

    Parses a file in a given filename and returns a parsed Circuit

27. def parseInfo(info: String): Info

    

    Parse the concrete syntax of a FIRRTL firrtl.ir.Info, e.g.

    Parse the concrete syntax of a FIRRTL firrtl.ir.Info, e.g. "@[FPU.scala 509:25]" becomes:

    FileInfo("FPU.scala 509:25")

    info

    concrete Info syntax

28. def parsePort(port: String): Port

    

    Parse the concrete syntax of a FIRRTL firrtl.ir.Port, e.g.

    Parse the concrete syntax of a FIRRTL firrtl.ir.Port, e.g. "input x: UInt" becomes:

    Port(NoInfo, "x", Input, UIntType(UnknownWidth))

    port

    concrete Port syntax

29. def parseStatement(statement: String): Statement

    

    Parse the concrete syntax of a FIRRTL firrtl.ir.Statement, e.g.

    Parse the concrete syntax of a FIRRTL firrtl.ir.Statement, e.g. "wire x: UInt" becomes:

    DefWire(NoInfo, "x", UIntType(UnknownWidth))

    statement

    concrete Statement syntax

30. def parseString(text: String, infoMode: InfoMode): Circuit

    

    Parses a String and returns a parsed Circuit

31. def parseType(tpe: String): Type

    

    Parse the concrete syntax of a FIRRTL firrtl.ir.Type, e.g.

    Parse the concrete syntax of a FIRRTL firrtl.ir.Type, e.g. "UInt<3>" becomes:

    UIntType(IntWidth(BigInt(3)))

    tpe

    concrete Type syntax

32. final def synchronized[T0](arg0: ⇒ T0): T0

    

    Definition Classes

    AnyRef

33. def toString(): String

    

    Definition Classes

    AnyRef → Any

34. final def wait(): Unit

    

    Definition Classes

    AnyRef

    Annotations

    @throws( ... )

35. final def wait(arg0: Long, arg1: Int): Unit

    

    Definition Classes

    AnyRef

    Annotations

    @throws( ... )

36. final def wait(arg0: Long): Unit

    

    Definition Classes

    AnyRef

    Annotations

    @throws( ... )