case classExtModule(info: Info, name: String, ports: Seq[Port], defname: String, params: Seq[Param]) extends DefModule with UseSerializer with Product with Serializable
External Module
Generally used for Verilog black boxes
defname
Defined name of the external module (ie. the name Firrtl will emit)
External Module
Generally used for Verilog black boxes
Defined name of the external module (ie. the name Firrtl will emit)