Bounds of IntervalType
Base class for modules
Port Direction
IEEE Double Precision Parameter (for Verilog real)
External Module
External Module
Generally used for Verilog black boxes
Defined name of the external module (ie. the name Firrtl will emit)
Field of BundleType
Stores the string of a file info annotation in its escaped form.
Intermediate Representation
Integer (of any width) Parameter
Internal Module
Internal Module
An instantiable hardware block
Orientation of Field
Parameters for external modules
DefModule Port
Primitive Operation
Primitive Operation
See PrimOps
Raw String Parameter Useful for Verilog type parameters
Raw String Parameter Useful for Verilog type parameters
Firrtl doesn't guarantee anything about this String being legal in any backend
Represents reference-like expression nodes: SubField, SubIndex, SubAccess and Reference The following fields can be cast to RefLikeExpression in every well formed firrtl AST: - SubField.expr, SubIndex.expr, SubAccess.expr - IsInvalid.expr, Connect.loc, PartialConnect.loc - Attach.exprs
String Parameter
Types of FirrtlNode
Positive Integer Bit Width of a GroundType
This object can performs a "structural" hash over any firrtl Module.
This object can performs a "structural" hash over any firrtl Module. It ignores: - [firrtl.ir.Expression Expression] types - Any [firrtl.ir.Info Info] fields - Description on DescribedStmt - each identifier name is replaced by a unique integer which only depends on the order of declaration and is thus deterministic - Module names are ignored.
Because of the way we "agnostify" bundle types, all SubField access nodes need to have a known bundle type. Thus - in a lot of cases, like after reading firrtl from a file - you need to run the firrtl type inference before hashing.
Please note that module hashes don't include any submodules. Two structurally equivalent modules are only functionally equivalent if they are part of the same circuit and thus all modules referred to in DefInstance are the same.