ClockDivider2
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package blackboxes
Called whenever the cycle command of the engine is called.
Called whenever the cycle command of the engine is called.
name of the clock, only need if there are multiple clocks
Called by TreadleTester#finish override this method to perform any cleanup necessary
Called by TreadleTester#finish override this method to perform any cleanup necessary
clk_out depends on clk_in
clk_out depends on clk_in
getOutput is called to determine the value for the named output at the current state of the system.
getOutput is called to determine the value for the named output at the current state of the system. The proper way to do this is to not use the inputValues. Instead useinputChanged to supply a black box with its inputs.
This is a list of BigInt values that are in the same order as the outputDependencies lists them
The concrete type of this output
The name of this output
Computed current concrete value for the name output
This method will be called for each input symbol of the black box.
This method will be called for each input symbol of the black box. This method should be overridden
the name of the input to this black box
the latest value computed for this input. It may not be different than the current value
returns a list of names of inputs that this output depends on.
returns a list of names of inputs that this output depends on.
the output whose dependencies are being described
The order of this list will determine the order of the inputValues argument to the getOutput method
Add any parameters to the black box implementation
Add any parameters to the black box implementation
allows blackbox to see if any plus args on command line are targeted at it
allows blackbox to see if any plus args on command line are targeted at it
list of args
This black-boxes a Clock Divider by 2. The output clock is phase-aligned to the input clock. If you use this in synthesis, make sure your sdc declares that you want it to do the same.
Because Chisel does not support blocking assignments, it is impossible to create a deterministic divided clock.
output clk_out Divided Clock input clk_in Clock Input