PrintfOp 1.3.2 - treadle.executable.PrintfOp

Instance Constructors

new PrintfOp(symbol: Symbol, info: Info, string: StringLit, args: Seq[ExpressionResult], fieldWidths: Seq[Int], clockTransition: ClockTransitionGetter, condition: IntExpressionResult, scheduler: Scheduler, addWallTime: Boolean)

Value Members

final def !=(arg0: Any): Boolean

Definition Classes
AnyRef → Any
final def ##(): Int

Definition Classes
AnyRef → Any
final def ==(arg0: Any): Boolean

Definition Classes
AnyRef → Any
val addWallTime: Boolean
val args: Seq[ExpressionResult]
final def asInstanceOf[T0]: T0

Definition Classes
Any
def asIs(b: BigInt): BigInt
val clockTransition: ClockTransitionGetter
def clone(): AnyRef

Attributes
protected[java.lang]
Definition Classes
AnyRef
Annotations
@throws( ... )
val condition: IntExpressionResult
def constructFormatter(formatString: String, bitWidths: Seq[Int]): (String, Seq[(BigInt) ⇒ Any])

Create a format string and a list format functions in order to implement the printf Figures out how many columns each output field show have from the bit widths We do this to match verilator's printf behavior more closely.
Create a format string and a list format functions in order to implement the printf Figures out how many columns each output field show have from the bit widths We do this to match verilator's printf behavior more closely. The problem type is binary that does not have a %-conversion code and char which requires a non-numeric value. This is why the format functions are BigInt => Any
formatString
The raw format string from the firrtl printf statement
bitWidths
The bit widths of each argument
final def eq(arg0: AnyRef): Boolean

Definition Classes
AnyRef
def executeVerilogPrint(allArgs: Seq[BigInt]): String
val fieldWidths: Seq[Int]
val filterFunctions: Seq[(BigInt) ⇒ Any]
def finalize(): Unit

Attributes
protected[java.lang]
Definition Classes
AnyRef
Annotations
@throws( classOf[java.lang.Throwable] )
final def getClass(): Class[_]

Definition Classes
AnyRef → Any
def getRenderMode: Boolean

Definition Classes
Assigner
val info: Info

Definition Classes
PrintfOp → Assigner
final def isInstanceOf[T0]: Boolean

Definition Classes
Any
def isVerbose: Boolean

Definition Classes
Assigner
def makeChar(b: BigInt): Char
def makeHex(base: BigInt)(b: BigInt): BigInt
final def ne(arg0: AnyRef): Boolean

Definition Classes
AnyRef
final def notify(): Unit

Definition Classes
AnyRef
final def notifyAll(): Unit

Definition Classes
AnyRef
val paddedFormatString: String
def render: String

Definition Classes
Assigner
def run: FuncUnit

Definition Classes
PrintfOp → Assigner
val scheduler: Scheduler
def setLeanMode(isLean: Boolean): Unit

Definition Classes
Assigner
def setRender(value: Boolean): Unit

Definition Classes
Assigner
def setVerbose(value: Boolean): Unit

Definition Classes
Assigner
val string: StringLit
val symbol: Symbol

Definition Classes
PrintfOp → Assigner
final def synchronized[T0](arg0: ⇒ T0): T0

Definition Classes
AnyRef
def toBinary(b: BigInt): String
final def wait(): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
final def wait(arg0: Long, arg1: Int): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )
final def wait(arg0: Long): Unit

Definition Classes
AnyRef
Annotations
@throws( ... )

PrintfOp

Related Docs: object PrintfOp | package executable

case class PrintfOp(symbol: Symbol, info: Info, string: StringLit, args: Seq[ExpressionResult], fieldWidths: Seq[Int], clockTransition: ClockTransitionGetter, condition: IntExpressionResult, scheduler: Scheduler, addWallTime: Boolean) extends Assigner with Product with Serializable

Instance Constructors

new PrintfOp(symbol: Symbol, info: Info, string: StringLit, args: Seq[ExpressionResult], fieldWidths: Seq[Int], clockTransition: ClockTransitionGetter, condition: IntExpressionResult, scheduler: Scheduler, addWallTime: Boolean)

Value Members

final def !=(arg0: Any): Boolean

final def ##(): Int

final def ==(arg0: Any): Boolean

val addWallTime: Boolean

val args: Seq[ExpressionResult]

final def asInstanceOf[T0]: T0

def asIs(b: BigInt): BigInt

val clockTransition: ClockTransitionGetter

def clone(): AnyRef

val condition: IntExpressionResult

def constructFormatter(formatString: String, bitWidths: Seq[Int]): (String, Seq[(BigInt) ⇒ Any])

final def eq(arg0: AnyRef): Boolean

def executeVerilogPrint(allArgs: Seq[BigInt]): String

val fieldWidths: Seq[Int]

val filterFunctions: Seq[(BigInt) ⇒ Any]

def finalize(): Unit

final def getClass(): Class[_]

def getRenderMode: Boolean

val info: Info

final def isInstanceOf[T0]: Boolean

def isVerbose: Boolean

def makeChar(b: BigInt): Char

def makeHex(base: BigInt)(b: BigInt): BigInt

final def ne(arg0: AnyRef): Boolean

final def notify(): Unit

final def notifyAll(): Unit

val paddedFormatString: String

def render: String

def run: FuncUnit

val scheduler: Scheduler

def setLeanMode(isLean: Boolean): Unit

def setRender(value: Boolean): Unit

def setVerbose(value: Boolean): Unit

val string: StringLit

val symbol: Symbol

final def synchronized[T0](arg0: ⇒ T0): T0

def toBinary(b: BigInt): String

final def wait(): Unit

final def wait(arg0: Long, arg1: Int): Unit

final def wait(arg0: Long): Unit

Inherited from Serializable

Inherited from Serializable

Inherited from Product

Inherited from Equals

Inherited from Assigner

Inherited from AnyRef

Inherited from Any

Ungrouped