Class

fringe.templates.memory

BankedSRAM

Related Doc: package memory

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class BankedSRAM extends MemPrimitive

Linear Supertypes
MemPrimitive, LegacyModule, ImplicitModule, UserModule, BaseModule, HasId, InstanceId, AnyRef, Any
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Inherited
  1. BankedSRAM
  2. MemPrimitive
  3. LegacyModule
  4. ImplicitModule
  5. UserModule
  6. BaseModule
  7. HasId
  8. InstanceId
  9. AnyRef
  10. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new BankedSRAM(tuple: (List[Int], Int, List[Int], List[Int], XMap, XMap, DMap, DMap, BankingMode))

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  2. new BankedSRAM(logicalDims: List[Int], bitWidth: Int, banks: List[Int], strides: List[Int], xBarWMux: XMap, xBarRMux: XMap, directWMux: DMap, directRMux: DMap, bankingMode: BankingMode, inits: Option[List[Double]], syncMem: Boolean, fracBits: Int, myName: String = "sram")

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  3. new BankedSRAM(p: MemParams)

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Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any

  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  4. def IO[T <: Data](iodef: T): iodef.type

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    Attributes
    protected
    Definition Classes
    BaseModule

  5. def _autoWrapPorts(): Unit

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    Definition Classes
    BaseModule

  6. var _closed: Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule

  7. def _ioPortBound(): Boolean

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    Attributes
    protected
    Definition Classes
    LegacyModule

  8. def annotate(annotation: ChiselAnnotation): Unit

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    Attributes
    protected
    Definition Classes
    BaseModule

  9. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any

  10. val bankDim: Int

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  11. val clock: Clock

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    Definition Classes
    ImplicitModule

  12. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  13. val compileOptions: CompileOptions

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    Definition Classes
    UserModule

  14. def connectDirectRPort(rBundle: R_Direct, bufferPort: Int, muxAddr: (Int, Int), castgrps: List[Int], broadcastids: List[Int], ignoreCastInfo: Boolean, flow: Bool): Seq[UInt]

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    Definition Classes
    MemPrimitive

  15. def connectDirectRPort(rBundle: R_Direct, bufferPort: Int, muxAddr: (Int, Int), castgrps: List[Int], broadcastids: List[Int], ignoreCastInfo: Boolean): Seq[UInt]

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    Definition Classes
    MemPrimitive

  16. def connectDirectWPort(wBundle: W_Direct, bufferPort: Int, muxAddr: (Int, Int)): Unit

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    Definition Classes
    MemPrimitive

  17. def connectXBarRPort(rBundle: R_XBar, bufferPort: Int, muxAddr: (Int, Int), castgrps: List[Int], broadcastids: List[Int], ignoreCastInfo: Boolean, flow: Bool): Seq[UInt]

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    Definition Classes
    MemPrimitive

  18. def connectXBarRPort(rBundle: R_XBar, bufferPort: Int, muxAddr: (Int, Int), castgrps: List[Int], broadcastids: List[Int], ignoreCastInfo: Boolean): Seq[UInt]

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    Definition Classes
    MemPrimitive

  19. def connectXBarWPort(wBundle: W_XBar, bufferPort: Int, muxAddr: (Int, Int)): Unit

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    Definition Classes
    MemPrimitive

  20. def desiredName: String

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    Definition Classes
    MemPrimitive → BaseModule

  21. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  22. def equals(that: Any): Boolean

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    Definition Classes
    HasId → AnyRef → Any

  23. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )

  24. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any

  25. def getCommands: Seq[Command]

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    Attributes
    protected
    Definition Classes
    UserModule

  26. def getIds: Seq[HasId]

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    Attributes
    protected
    Definition Classes
    BaseModule

  27. def getModulePorts: Seq[Data]

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    Attributes
    protected
    Definition Classes
    BaseModule

  28. lazy val getPorts: Seq[Port]

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    Definition Classes
    UserModule

  29. def hashCode(): Int

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    Definition Classes
    HasId → AnyRef → Any

  30. def instanceName: String

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    Definition Classes
    BaseModule → HasId → InstanceId

  31. val io: MemInterface

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    Definition Classes
    MemPrimitive → LegacyModule

  32. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any

  33. val m: IndexedSeq[(Mem1D, List[Int])]

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  34. final val name: String

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    Definition Classes
    BaseModule

  35. def nameIds(rootClass: Class[_]): HashMap[HasId, String]

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    Attributes
    protected
    Definition Classes
    LegacyModule → BaseModule

  36. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  37. final def notify(): Unit

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    Definition Classes
    AnyRef

  38. final def notifyAll(): Unit

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    Definition Classes
    AnyRef

  39. val numMems: Int

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  40. var override_clock: Option[Clock]

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    Attributes
    protected
    Definition Classes
    LegacyModule

  41. var override_reset: Option[Bool]

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    Attributes
    protected
    Definition Classes
    LegacyModule

  42. val p: MemParams

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    Definition Classes
    MemPrimitive

  43. def parentModName: String

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    Definition Classes
    HasId → InstanceId

  44. def parentPathName: String

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    Definition Classes
    HasId → InstanceId

  45. def pathName: String

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    Definition Classes
    HasId → InstanceId

  46. def portsContains(elem: Data): Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule

  47. def portsSize: Int

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    Attributes
    protected
    Definition Classes
    BaseModule

  48. val reset: Reset

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    Definition Classes
    ImplicitModule

  49. def suggestName(name: ⇒ String): BankedSRAM.this.type

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    Definition Classes
    HasId

  50. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef

  51. def toString(): String

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    Definition Classes
    AnyRef → Any

  52. var usedMuxPorts: List[(String, (Int, Int, Int, Int))]

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    Definition Classes
    MemPrimitive

  53. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  54. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  55. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Inherited from MemPrimitive

Inherited from LegacyModule

Inherited from ImplicitModule

Inherited from UserModule

Inherited from BaseModule

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped