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utils

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package utils

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Type Members

class Depulser extends Module

Depulser: 1-cycle pulse to a steady high signal.
class GCD extends Module
abstract class GenericParameterizedBundle[T <: AnyRef] extends Bundle
class HVec[T <: Data] extends Record with IndexedSeq[T]
class MuxN[T <: Data] extends Module
class MuxNReg extends Module
class MuxPipe[T <: Data] extends Module
class Pulser extends Module

Converts a rising edge to a 1-cycle pulse.

Value Members

object Banks
object DMap
object HVec
object NBufDMap
object NBufXMap
object XMap
def delay(signal: FixedPoint, length: Int): FixedPoint
def delay(signal: UInt, length: Int): UInt
def delay(signal: Bool, length: Int): Bool
def getFF[T <: Data](sig: T, en: UInt): T
def getRetimed[T <: Data](sig: T, delay: Int, en: Bool = true.B, init: Long = 0): T
object implicits
def log2Up(n: Double): Int
def log2Up(n: BigInt): Int
def log2Up(n: Int): Int
def mux[T <: Data](cond: UInt, op1: T, op2: T): T
def mux[T <: Data](cond: Bool, op1: T, op2: T): T

Info that comes from the compiler:
Info that comes from the compiler:
|--------------|--------------| | Buffer 0 | Buffer 1 | |--------------|--------------| bufferPort 0 1 The buffer port (None for access outside pipeline) |x x x| |x x x|
/ \ / \
|x x x|x x| |x x x|x x x| muxPort 0 1 0 1 The ID for the given time multiplexed vector
|( ) O|O O| |( )|( ) O| muxOfs 0 2 0 1 0 0 2 Start offset into the time multiplexed vector
def printStackTrace(): Unit
def pulse(in: Bool): Bool
def risingEdge(sig: Bool): Bool
def roundUpDivide(num: Int, divisor: Int): Int
def streamCatchDone(in_done: Bool, ready: Bool, retime: Int, rr: Bool, reset: Bool): Bool
def vecJoin[T <: Data](v1: Vec[T], v2: Vec[T]): Vec[T]
def vecSlice[T <: Data](v: Vec[T], start: Int, end: Int): Vec[T]
def vecWidthConvert[T <: Data](vec: Vec[T], newW: Int): Vec[UInt]

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