class
VhdlTestBenchBackend extends VhdlBase
Instance Constructors
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new
VhdlTestBenchBackend()
Value Members
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final
def
!=(arg0: Any): Boolean
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final
def
##(): Int
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final
def
==(arg0: Any): Boolean
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final
def
asInstanceOf[T0]: T0
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def
clone(): AnyRef
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def
elaborate(backend: VhdlBackend, topLevel: Component): Unit
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def
emitClockEdge(clock: Bool, edgeKind: EdgeKind): String
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def
emitComponentInstance(c: Component, ret: StringBuilder): Unit
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def
emitDataType(node: Node, constrained: Boolean = true): String
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def
emitDirection(baseType: BaseType): String
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def
emitRange(node: Node): String
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def
emitReference(node: Node): String
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def
emitSignal(ref: Node, typeNode: Node): String
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def
emitSignals(c: Component, ret: StringBuilder): Unit
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def
emitUserCode(tab: String, name: String, ret: StringBuilder): Unit
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final
def
eq(arg0: AnyRef): Boolean
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def
equals(arg0: Any): Boolean
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def
extractUserCodes: Unit
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def
finalize(): Unit
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final
def
getClass(): Class[_]
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def
hashCode(): Int
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final
def
isInstanceOf[T0]: Boolean
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def
isReferenceable(node: Node): Boolean
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final
def
ne(arg0: AnyRef): Boolean
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final
def
notify(): Unit
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final
def
notifyAll(): Unit
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var
out: FileWriter
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var
outputFile: String
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final
def
synchronized[T0](arg0: ⇒ T0): T0
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var
tbName: String
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def
toString(): String
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val
userCodes: Map[String, String]
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val
vhdlKeyWords: Set[String]
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final
def
wait(): Unit
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final
def
wait(arg0: Long, arg1: Int): Unit
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final
def
wait(arg0: Long): Unit
Inherited from AnyRef
Inherited from Any