Packages

case class SpinalConfig(mode: SpinalMode = null, debug: Boolean = false, debugComponents: HashSet[Class[_]] = mutable.HashSet[Class[_]](), keepAll: Boolean = false, defaultConfigForClockDomains: ClockDomainConfig = ClockDomainConfig(), onlyStdLogicVectorAtTopLevelIo: Boolean = false, defaultClockDomainFrequency: IClockDomainFrequency = UnknownFrequency(), targetDirectory: String = ".", oneFilePerComponent: Boolean = false, netlistFileName: String = null, dumpWave: DumpWaveConfig = null, globalPrefix: String = "", anonymSignalPrefix: String = null, device: Device = Device(), inlineRom: Boolean = false, genVhdlPkg: Boolean = true, verbose: Boolean = false, mergeAsyncProcess: Boolean = true, asyncResetCombSensitivity: Boolean = false, phasesInserters: ArrayBuffer[(ArrayBuffer[Phase]) ⇒ Unit] = ..., transformationPhases: ArrayBuffer[Phase] = ArrayBuffer[Phase](), memBlackBoxers: ArrayBuffer[Phase] = ...) extends Product with Serializable

Spinal configuration for the generation of the RTL

Linear Supertypes
Serializable, Serializable, Product, Equals, AnyRef, Any
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  1. SpinalConfig
  2. Serializable
  3. Serializable
  4. Product
  5. Equals
  6. AnyRef
  7. Any
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Visibility
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Instance Constructors

  1. new SpinalConfig(mode: SpinalMode = null, debug: Boolean = false, debugComponents: HashSet[Class[_]] = mutable.HashSet[Class[_]](), keepAll: Boolean = false, defaultConfigForClockDomains: ClockDomainConfig = ClockDomainConfig(), onlyStdLogicVectorAtTopLevelIo: Boolean = false, defaultClockDomainFrequency: IClockDomainFrequency = UnknownFrequency(), targetDirectory: String = ".", oneFilePerComponent: Boolean = false, netlistFileName: String = null, dumpWave: DumpWaveConfig = null, globalPrefix: String = "", anonymSignalPrefix: String = null, device: Device = Device(), inlineRom: Boolean = false, genVhdlPkg: Boolean = true, verbose: Boolean = false, mergeAsyncProcess: Boolean = true, asyncResetCombSensitivity: Boolean = false, phasesInserters: ArrayBuffer[(ArrayBuffer[Phase]) ⇒ Unit] = ..., transformationPhases: ArrayBuffer[Phase] = ArrayBuffer[Phase](), memBlackBoxers: ArrayBuffer[Phase] = ...)

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##(): Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def addStandardMemBlackboxing(policy: MemBlackboxingPolicy): SpinalConfig.this.type
  5. def addTransformationPhase(phase: Phase): SpinalConfig
  6. val anonymSignalPrefix: String
  7. def apply[T <: Component](gen: ⇒ T): SpinalReport[T]
  8. def applyToGlobalData(globalData: GlobalData): Unit
  9. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  10. val asyncResetCombSensitivity: Boolean
  11. def clone(): AnyRef
    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @native() @throws( ... )
  12. val debugComponents: HashSet[Class[_]]
  13. val defaultClockDomainFrequency: IClockDomainFrequency
  14. val defaultConfigForClockDomains: ClockDomainConfig
  15. val device: Device
  16. def dumpWave(depth: Int = 0, vcdPath: String = "wave.vcd"): SpinalConfig
  17. val dumpWave: DumpWaveConfig
  18. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  19. def finalize(): Unit
    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  20. val genVhdlPkg: Boolean
  21. def generate[T <: Component](gen: ⇒ T): SpinalReport[T]
  22. def generateVerilog[T <: Component](gen: ⇒ T): SpinalReport[T]
  23. def generateVhdl[T <: Component](gen: ⇒ T): SpinalReport[T]
  24. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native()
  25. val globalPrefix: String
  26. val inlineRom: Boolean
  27. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  28. val keepAll: Boolean
  29. val memBlackBoxers: ArrayBuffer[Phase]
  30. val mergeAsyncProcess: Boolean
  31. val mode: SpinalMode
  32. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  33. val netlistFileName: String
  34. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native()
  35. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native()
  36. val oneFilePerComponent: Boolean
  37. val onlyStdLogicVectorAtTopLevelIo: Boolean
  38. val phasesInserters: ArrayBuffer[(ArrayBuffer[Phase]) ⇒ Unit]
  39. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  40. val targetDirectory: String
  41. val transformationPhases: ArrayBuffer[Phase]
  42. val verbose: Boolean
  43. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  44. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  45. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @throws( ... )

Deprecated Value Members

  1. val debug: Boolean
    Annotations
    @deprecated
    Deprecated

Inherited from Serializable

Inherited from Serializable

Inherited from Product

Inherited from Equals

Inherited from AnyRef

Inherited from Any

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