Packages

c

spinal.core

BitVector

abstract class BitVector extends BaseType with Widthable

BitVector is a family of types for storing multiple bits of information in a single value. This type has three subtypes that can be used to model different behaviors:

  • Bits
  • UInt (unsigned integer)
  • SInt (signed integer)
See also

BitVector family Documentation

Linear Supertypes
Widthable, WidthProvider, BaseType, Expression, StatementDoubleLinkedContainer[BaseType, AssignmentStatement], DoubleLinkedContainer[BaseType, AssignmentStatement], DeclarationStatement, LeafStatement, Statement, BaseNode, ExpressionContainer, Data, InComponent, OverridedEqualsHashCode, SpinalTagReady, Assignable, NameableByComponent, Nameable, OwnableRef, ContextUser, ScalaLocated, GlobalDataUser, AnyRef, Any
Known Subclasses
Bits, SInt, UInt
Ordering
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Inherited
  1. BitVector
  2. Widthable
  3. WidthProvider
  4. BaseType
  5. Expression
  6. StatementDoubleLinkedContainer
  7. DoubleLinkedContainer
  8. DeclarationStatement
  9. LeafStatement
  10. Statement
  11. BaseNode
  12. ExpressionContainer
  13. Data
  14. InComponent
  15. OverridedEqualsHashCode
  16. SpinalTagReady
  17. Assignable
  18. NameableByComponent
  19. Nameable
  20. OwnableRef
  21. ContextUser
  22. ScalaLocated
  23. GlobalDataUser
  24. AnyRef
  25. Any
  1. Hide All
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new BitVector()

Type Members

  1. abstract type RefOwnerType
    Definition Classes
    OwnableRef
  2. abstract type T <: BitVector

    Used to know the data type of the children class of BitVector

Abstract Value Members

  1. abstract def apply(offset: UInt, bitCount: BitCount): BitVector.this.type

    Return a range of bits at offset and of width bitCount

    Return a range of bits at offset and of width bitCount

    Example: 

    1. val myBool = myBits(myUInt, 2 bits)
  2. abstract def apply(offset: Int, bitCount: BitCount): BitVector.this.type

    Return a range of bits at offset and of width bitCount

    Return a range of bits at offset and of width bitCount

    Example: 

    1. val myBool = myBits(3, 2 bits)
  3. abstract def apply(bitId: UInt): Bool

    Return the bit at index bitId

    Return the bit at index bitId

    Example: 

    1. val myBool = myBits(myUInt)
  4. abstract def apply(bitId: Int): Bool

    Return the bit at index bitId

    Return the bit at index bitId

    Example: 

    1. val myBool = myBits(3)
  5. abstract def asBits: Bits

    Cast signal to Bits

    Cast signal to Bits

    Definition Classes
    Data
  6. abstract def assignFromBits(bits: Bits, hi: Int, low: Int): Unit
    Definition Classes
    Data
  7. abstract def assignFromBits(bits: Bits): Unit
    Definition Classes
    Data
  8. abstract def getAllTrue: BitVector.this.type
  9. abstract def getTypeObject: Any
    Definition Classes
    Expression
  10. abstract def getZero: BitVector.this.type

    Create a signal set to 0

    Create a signal set to 0

    Definition Classes
    Data
  11. abstract def getZeroUnconstrained: BitVector.this.type
  12. abstract def opName: String
    Definition Classes
    Expression
  13. abstract def resize(width: BitCount): BitVector
  14. abstract def resize(width: Int): BitVector

    Resize the bitVector to width

    Resize the bitVector to width

    returns

    a resized bitVector

    Example: 

    1. val res = myBits.resize(10)
  15. abstract def reversed: BitVector.this.type
  16. abstract def rotateLeft(that: Int): T

    Left rotation of that bits

  17. abstract def rotateRight(that: Int): T

    Right rotation of that bits

Concrete Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. def ##(right: Data): Bits

    Concatenation between two signals

    Concatenation between two signals

    Definition Classes
    Data
  3. final def ##(): Int
    Definition Classes
    AnyRef → Any
  4. def #*(count: Int): Bits
    Definition Classes
    Data
  5. def =/=(that: MaskedLiteral): Bool

    BitVector is not equal to MaskedLiteral

  6. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  7. def ===(that: MaskedLiteral): Bool

    Compare a BitVector with a MaskedLiteral (M"110--0")

    Compare a BitVector with a MaskedLiteral (M"110--0")

    that

    the maskedLiteral

    returns

    a Bool data containing the result of the comparison

    Example: 

    1. val myBool = myBits === M"0-1"
  8. def IFparent: Data
    Definition Classes
    Data
  9. val _spinalTags: LinkedHashSet[SpinalTag]
    Definition Classes
    SpinalTagReady
  10. def addAttribute(attribute: Attribute): BitVector.this.type
    Definition Classes
    BaseType → Data → SpinalTagReady
  11. def addAttribute(name: String, value: Int): BitVector.this.type
    Definition Classes
    SpinalTagReady
  12. def addAttribute(name: String, value: String): BitVector.this.type
    Definition Classes
    SpinalTagReady
  13. def addAttribute(name: String): BitVector.this.type
    Definition Classes
    SpinalTagReady
  14. def addTag[T <: SpinalTag](spinalTag: T): BitVector.this.type
    Definition Classes
    SpinalTagReady
  15. def addTags(h: SpinalTag, tail: SpinalTag*): BitVector.this.type
    Definition Classes
    SpinalTagReady
  16. def addTags[T <: SpinalTag](tags: Iterable[T]): BitVector.this.type
    Definition Classes
    SpinalTagReady
  17. val algoIncrementale: Int
    Definition Classes
    BaseNode
  18. val algoInt: Int
    Definition Classes
    BaseNode
  19. def allowDirectionLessIo(): BitVector.this.type

    Allow a signal of an io Bundle to be directionless.

    Allow a signal of an io Bundle to be directionless.

    Definition Classes
    Data
    See also

    IO Bundle Error Documentation

  20. def allowOverride(): BitVector.this.type

    Allow a signal to be overridden.

    Allow a signal to be overridden.

    Definition Classes
    Data
    See also

    Assignment overlap Error Documentation

  21. def allowPartialyAssigned(): BitVector.this.type

    Allow a register to be partially assigned

    Allow a register to be partially assigned

    Definition Classes
    Data
  22. def allowPruning(): BitVector.this.type
    Definition Classes
    Data
  23. def allowSimplifyIt(): BitVector.this.type
    Definition Classes
    BaseType → Data
  24. def allowUnsetRegToAvoidLatch(): BitVector.this.type

    Allow a register to have only an init (no assignments)

    Allow a register to have only an init (no assignments)

    Definition Classes
    Data
    See also

    "Register with only init" Error Documentation

  25. def andMask(that: Bool): BitVector.this.type
  26. def andR: Bool

    Hardware logical AND of all bits

    Hardware logical AND of all bits

    Equivalent to this.asBits === ((BigInt(1) << getWidth) - 1).

  27. def apply(range: Range): BitVector.this.type

    Return a range of bits

    Return a range of bits

    Example: 

    1. val myBool = myBits(3 downto 1)
  28. def as[T <: Data](dataType: HardType[T]): T
    Definition Classes
    Data
  29. def asBool: Bool

    Return this.lsb

  30. def asBools: Vec[Bool]

    Cast the BitVector into a vector of Bool

  31. def asData: Data
    Definition Classes
    Data
  32. def asInOut(): BitVector.this.type

    Set a signal as inout

    Set a signal as inout

    Definition Classes
    BaseType → Data
  33. def asInput(): BitVector.this.type

    Set a data as input

    Set a data as input

    Definition Classes
    BaseType → Data
  34. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  35. def asOutput(): BitVector.this.type

    Set a data as output

    Set a data as output

    Definition Classes
    BaseType → Data
  36. def assignDontCare(): BitVector.this.type
    Definition Classes
    Data
  37. def assignDontCareToUnasigned(): BitVector.this.type
    Definition Classes
    Data
  38. def assignFormalRandom(kind: RandomExpKind): Unit
    Definition Classes
    Data
  39. final def assignFrom(that: AnyRef, target: AnyRef = this)(implicit loc: Location): Unit
    Definition Classes
    Data
  40. def assignFromBits(bits: Bits, offset: Int, bitCount: BitCount): Unit
    Definition Classes
    Data
  41. def assignFromImpl(that: AnyRef, target: AnyRef, kind: AnyRef)(implicit loc: Location): Unit
    Attributes
    protected
    Definition Classes
    BaseType → Assignable
  42. def bitsRange: Range
  43. def cldCount: Int
    Definition Classes
    DoubleLinkedContainer
  44. def clearAll(): BitVector.this.type

    Clear all bits

    Clear all bits

    Definition Classes
    BitVector → Data
  45. var clockDomain: ClockDomain
    Definition Classes
    BaseType
  46. def clone(): BitVector.this.type
    Definition Classes
    BitVector → BaseType → Data → AnyRef
  47. def component: Component
    Definition Classes
    ContextUser
  48. final def compositAssignFrom(that: AnyRef, target: AnyRef, kind: AnyRef)(implicit loc: Location): Unit
    Definition Classes
    Assignable
  49. val compositeAssign: Assignable
    Definition Classes
    Assignable
  50. def copyDirectionOfImpl(that: Data): BitVector.this.type
    Definition Classes
    BaseType → Data
  51. def dirString(): String
    Definition Classes
    Data
  52. def dlcAppend(that: AssignmentStatement): BitVector.this.type
    Definition Classes
    DoubleLinkedContainer
  53. def dlcForeach[T >: AssignmentStatement](func: (T) ⇒ Unit): Unit
    Definition Classes
    DoubleLinkedContainer
  54. def dlcHasOnlyOne: Boolean
    Definition Classes
    DoubleLinkedContainer
  55. val dlcHead: AssignmentStatement
    Definition Classes
    DoubleLinkedContainer
  56. def dlcIsEmpty: Boolean
    Definition Classes
    DoubleLinkedContainer
  57. val dlcLast: AssignmentStatement
    Definition Classes
    DoubleLinkedContainer
  58. def dlcPrepend(that: AssignmentStatement): BitVector.this.type
    Definition Classes
    DoubleLinkedContainer
  59. def dontSimplifyIt(): BitVector.this.type
    Definition Classes
    BaseType → Data
  60. def drop(n: Int): Bits

    Drop lowest n bits

    Drop lowest n bits

    returns

    data10bits(9 downto 4)

    Example: 

    1. val res = data10bits.drop(4)
  61. def dropHigh(n: Int): Bits

    Drop highest n bits

    Drop highest n bits

    returns

    data10bits(5 downto 0)

    Example: 

    1. val res = data10bits.dropHigh(4)
  62. def dropLow(n: Int): Bits
  63. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  64. def equals(obj: Any): Boolean
    Definition Classes
    OverridedEqualsHashCode → AnyRef → Any
  65. def existsTag(cond: (SpinalTag) ⇒ Boolean): Boolean
    Definition Classes
    SpinalTagReady
  66. def filterTag(cond: (SpinalTag) ⇒ Boolean): Iterable[SpinalTag]
    Definition Classes
    SpinalTagReady
  67. def findTag(cond: (SpinalTag) ⇒ Boolean): Option[SpinalTag]
    Definition Classes
    SpinalTagReady
  68. def flatten: Seq[BaseType]
    Definition Classes
    BaseType → Data
  69. def flattenForeach(body: (BaseType) ⇒ Unit): Unit
    Definition Classes
    BaseType → Data
  70. def flattenLocalName: Seq[String]
    Definition Classes
    BaseType → Data
  71. def flip(): BitVector.this.type

    Flip the direction of the signal.

    Flip the direction of the signal.

    in and out are swapped, inout stay the same.

    Definition Classes
    Data
  72. def foreachClockDomain(func: (ClockDomain) ⇒ Unit): Unit
    Definition Classes
    BaseType → Statement
  73. def foreachDrivingExpression(func: (Expression) ⇒ Unit): Unit
    Definition Classes
    ExpressionContainer
  74. def foreachExpression(func: (Expression) ⇒ Unit): Unit
    Definition Classes
    DeclarationStatement → ExpressionContainer
  75. def foreachReflectableNameables(doThat: (Any) ⇒ Unit): Unit
    Definition Classes
    Nameable
  76. def foreachStatements(func: (AssignmentStatement) ⇒ Unit): Unit
    Definition Classes
    StatementDoubleLinkedContainer
  77. def foreachTag(body: (SpinalTag) ⇒ Unit): Unit
    Definition Classes
    SpinalTagReady
  78. def freeze(): BitVector.this.type
    Definition Classes
    BaseType → Data
  79. def getAheadValue(): BitVector.this.type

    For a register, get the value it will have at the next clock, as a combinational signal.

    For a register, get the value it will have at the next clock, as a combinational signal.

    Definition Classes
    BaseType → Data
  80. def getBitsWidth: Int

    Return the width of the data

    Return the width of the data

    Definition Classes
    BitVector → Data
  81. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  82. def getComponent(): Component
    Definition Classes
    Data → InComponent → NameableByComponent
  83. def getComponents(): Seq[Component]

    Get current component with all parents

    Get current component with all parents

    Definition Classes
    InComponent
  84. def getDirection: IODirection
    Definition Classes
    Data
  85. def getDisplayName(): String
    Definition Classes
    Nameable
  86. def getDrivingReg(reportError: Boolean = true): BitVector.this.type
    Definition Classes
    BaseType
  87. def getInstanceCounter: Int
    Definition Classes
    ContextUser
  88. def getMode: Byte
    Attributes
    protected
    Definition Classes
    Nameable
  89. def getMuxType[T <: Data](list: TraversableOnce[T]): HardType[T]
    Definition Classes
    BitVector → Data
  90. def getName(default: String): String
    Definition Classes
    NameableByComponent → Nameable
  91. def getName(): String
    Definition Classes
    NameableByComponent → Nameable
  92. def getPartialName(): String
    Definition Classes
    Nameable
  93. def getPath(from: Component, to: Component): Seq[Component]
    Definition Classes
    NameableByComponent
  94. def getRealSource: Any
    Definition Classes
    Assignable
  95. def getRealSourceNoRec: Any
    Definition Classes
    Data → Assignable
  96. def getRefOwnersChain(): List[Any]
    Definition Classes
    OwnableRef
  97. def getRootParent: Data
    Definition Classes
    Data
  98. def getRtlPath(separator: String = "/"): String
    Definition Classes
    Data
  99. def getScalaLocationLong: String
    Definition Classes
    ScalaLocated
  100. def getScalaLocationShort: String
    Definition Classes
    ScalaLocated
  101. def getScalaTrace(): Throwable
    Definition Classes
    ScalaLocated
  102. def getSingleDriver: Option[BitVector.this.type]
    Definition Classes
    BaseType
  103. def getTag[T <: SpinalTag](clazz: Class[T]): Option[T]
    Definition Classes
    SpinalTagReady
  104. def getTags(): LinkedHashSet[SpinalTag]
    Definition Classes
    SpinalTagReady
  105. def getWidth: Int
    Definition Classes
    Widthable → WidthProvider
  106. def getWidthNoInferation: Int

    Return the width

  107. def getWidthStringNoInferation: String
  108. val globalData: GlobalData
    Definition Classes
    GlobalDataUser
  109. def hasAssignement: Boolean
    Definition Classes
    BaseType
  110. def hasDataAssignment: Boolean
    Definition Classes
    BaseType
  111. def hasInit: Boolean

    Does the base type have initial value

    Does the base type have initial value

    Definition Classes
    BaseType
  112. def hasOnlyOneStatement: Boolean
    Definition Classes
    StatementDoubleLinkedContainer
  113. def hasTag[T <: SpinalTag](clazz: Class[T]): Boolean
    Definition Classes
    SpinalTagReady
  114. def hasTag(spinalTag: SpinalTag): Boolean
    Definition Classes
    SpinalTagReady
  115. def hashCode(): Int
    Definition Classes
    OverridedEqualsHashCode → AnyRef → Any
  116. def head: AssignmentStatement
    Definition Classes
    StatementDoubleLinkedContainer
  117. def high: Int

    Return the upper bound

  118. final def initFrom(that: AnyRef, target: AnyRef = this): Unit
    Definition Classes
    Data
  119. def initialFrom(that: AnyRef, target: AnyRef = this): Unit
    Definition Classes
    BaseType
  120. def insertNext(s: Statement): Unit
    Definition Classes
    Statement
  121. def instanceAttributes(language: Language): Iterable[Attribute]
    Definition Classes
    SpinalTagReady
  122. def instanceAttributes: Iterable[Attribute]
    Definition Classes
    SpinalTagReady
  123. def isAnalog: Boolean
    Definition Classes
    BaseType → Data
  124. def isComb: Boolean
    Definition Classes
    BaseType → Data
  125. def isCompletelyUnnamed: Boolean
    Definition Classes
    Nameable
  126. def isDirectionLess: Boolean
    Definition Classes
    Data
  127. def isEmptyOfTag: Boolean
    Definition Classes
    SpinalTagReady
  128. def isFrozen(): Boolean
    Definition Classes
    BaseType
  129. def isInOut: Boolean
    Definition Classes
    Data
  130. def isInput: Boolean
    Definition Classes
    Data
  131. def isInputOrInOut: Boolean
    Definition Classes
    Data
  132. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  133. final def isNamed: Boolean
    Definition Classes
    Nameable
  134. def isOutput: Boolean
    Definition Classes
    Data
  135. def isOutputOrInOut: Boolean
    Definition Classes
    Data
  136. def isPriorityApplicable(namePriority: Byte): Boolean
    Definition Classes
    Nameable
  137. def isReg: Boolean
    Definition Classes
    BaseType → Data
  138. def isRegOnAssign: Boolean
    Definition Classes
    BitVector → Data
  139. def isTypeNode: Boolean

    Is the baseType a node

    Is the baseType a node

    Definition Classes
    BaseType
  140. def isUnknown: Bool
  141. def isUnnamed: Boolean
    Definition Classes
    NameableByComponent → Nameable
  142. def isUsingResetSignal: Boolean

    Is the basetype using reset signal

    Is the basetype using reset signal

    Definition Classes
    BaseType
  143. def isUsingSoftResetSignal: Boolean

    Is the basetype using soft reset signal

    Is the basetype using soft reset signal

    Definition Classes
    BaseType
  144. def isVital: Boolean

    Check if the baseType is vital

    Check if the baseType is vital

    Definition Classes
    BaseType
  145. val lastScopeStatement: Statement
    Definition Classes
    Statement
  146. def lsb: Bool

    Return the least significant bit

  147. def msb: Bool

    Return the most significant bit

  148. def mux[T2 <: Data](mappings: (Any, T2)*): T2

    Use a SpinalHDL data as a selector for a mux.

    Use a SpinalHDL data as a selector for a mux.

    Definition Classes
    BaseType
    See also

    Bitwise selection Documentation

  149. def muxDc[T2 <: Data](mappings: (Any, T2)*): T2

    Version of SpinalHDL mux that allows Don't Care.

    Version of SpinalHDL mux that allows Don't Care.

    Definition Classes
    BaseType
    See also

    Bitwise selection Documentation

  150. def muxList[T2 <: Data](defaultValue: T2, mappings: Seq[(Any, T2)]): T2

    Use a scala.Seq of SpinalHDL data as mux inputs.

    Use a scala.Seq of SpinalHDL data as mux inputs.

    Definition Classes
    BaseType
    See also

    Bitwise selection Documentation

  151. def muxList[T2 <: Data](mappings: Seq[(Any, T2)]): T2

    Use a scala.Seq of SpinalHDL data as mux inputs.

    Use a scala.Seq of SpinalHDL data as mux inputs.

    Definition Classes
    BaseType
    See also

    Bitwise selection Documentation

  152. def muxListDc[T2 <: Data](mappings: Seq[(Any, T2)]): T2

    Version of SpinalHDL muxList that allows Don't Care.

    Version of SpinalHDL muxList that allows Don't Care.

    Definition Classes
    BaseType
    See also

    Bitwise selection Documentation

  153. val name: String
    Definition Classes
    Nameable
  154. val nameableRef: Nameable
    Attributes
    protected
    Definition Classes
    Nameable
    Annotations
    @DontName()
  155. def nandR: Bool

    Hardware logical NAND of all bits

  156. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  157. def newExtract(offset: UInt, size: Int, extract: BitVectorRangedAccessFloating)(implicit loc: Location): BitVector.this.type

    Extract a range of bits of the BitVector

  158. def newExtract(hi: Int, lo: Int, accessFactory: ⇒ BitVectorRangedAccessFixed): BitVector.this.type

    Extract a range of bits of the BitVector

  159. def newExtract(bitId: UInt, extract: BitVectorBitAccessFloating): Bool

    Extract a bit of the BitVector

  160. def newExtract(bitId: Int, extract: BitVectorBitAccessFixed): Bool

    Extract a bit of the BitVector

  161. val nextScopeStatement: Statement
    Definition Classes
    Statement
  162. def noBackendCombMerge(): BitVector.this.type

    Put the combinatorial logic driving this signal in a separate process

    Put the combinatorial logic driving this signal in a separate process

    Definition Classes
    Data
  163. def noCombLoopCheck(): BitVector.this.type

    Disable combinatorial loop checking for this Data

    Disable combinatorial loop checking for this Data

    Definition Classes
    Data
    See also

    Combinatorial loop Error Documentation

  164. def norR: Bool

    Hardware logical NOR of all bits

  165. def normalizeInputs: Unit
    Definition Classes
    BaseType → ExpressionContainer
  166. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  167. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  168. def nxorR: Bool

    Hardware logical NXOR of all bits

  169. def onEachAttributes(doIt: (Attribute) ⇒ Unit): Unit
    Definition Classes
    SpinalTagReady
  170. def orMask(that: Bool): BitVector.this.type
  171. def orR: Bool

    Hardware logical OR of all bits

    Hardware logical OR of all bits

    Equivalent to this.asBits =/= 0.

  172. def overrideLocalName(name: String): BitVector.this.type
    Definition Classes
    Nameable
  173. val parent: Data
    Definition Classes
    Data
  174. val parentScope: ScopeStatement
    Definition Classes
    ContextUser
  175. def pull(propagateName: Boolean): BitVector.this.type
    Definition Classes
    Data
  176. def pull(): BitVector.this.type

    Pull a signal to the top level (use for debugging)

    Pull a signal to the top level (use for debugging)

    Definition Classes
    Data
  177. def purify(): BitVector.this.type
    Definition Classes
    Data
  178. def randBoot(u: Unit): BitVector.this.type

    Useful for register that doesn't need a reset value in RTL, but need a random value for simulation (avoid x-propagation)

    Useful for register that doesn't need a reset value in RTL, but need a random value for simulation (avoid x-propagation)

    Definition Classes
    Data
  179. val refOwner: RefOwnerType
    Definition Classes
    OwnableRef
    Annotations
    @DontName()
  180. def reflectNames(): Unit
    Definition Classes
    Nameable
  181. def remapClockDomain(func: (ClockDomain) ⇒ ClockDomain): Unit
    Definition Classes
    BaseType → Statement
  182. def remapDrivingExpressions(func: (Expression) ⇒ Expression): Unit
    Definition Classes
    ExpressionContainer
  183. def remapExpressions(func: (Expression) ⇒ Expression): Unit
    Definition Classes
    DeclarationStatement → ExpressionContainer
  184. def removeAssignments(data: Boolean = true, init: Boolean = true, initial: Boolean = true): BitVector.this.type

    Remove all assignments of the base type

    Remove all assignments of the base type

    Definition Classes
    BaseType → Data
  185. def removeDataAssignments(): BitVector.this.type
    Definition Classes
    Data
  186. def removeInitAssignments(): BitVector.this.type
    Definition Classes
    Data
  187. def removeStatement(): Unit
    Definition Classes
    BaseType → Statement
  188. def removeStatementFromScope(): Unit
    Definition Classes
    Statement
  189. def removeTag(spinalTag: SpinalTag): BitVector.this.type
    Definition Classes
    SpinalTagReady
  190. def removeTags(tags: Iterable[SpinalTag]): BitVector.this.type
    Definition Classes
    SpinalTagReady
  191. def resized: BitVector.this.type

    Return a version of the signal which is allowed to be automatically resized where needed.

    Return a version of the signal which is allowed to be automatically resized where needed.

    The resize operation is deferred until the point of assignment later. The resize may widen or truncate, retaining the LSB.

    Definition Classes
    Data
    See also

    Width checking Documentation

  192. def rootIF(): Interface

    root interface

    root interface

    Definition Classes
    Data
  193. def rootIFList(): List[Interface]
    Definition Classes
    Data
  194. def rootIFrec(now: Data, lastRoot: List[Interface]): List[Interface]
    Definition Classes
    Data
  195. def rootScopeStatement: ScopeStatement
    Definition Classes
    BaseType → Statement
  196. def rotateLeft(that: UInt): T

    Left rotation of that Bits

  197. def rotateRight(that: UInt): T

    Right rotation of that Bits

  198. val scalaTrace: Throwable
    Definition Classes
    ScalaLocated
  199. def setAll(): BitVector.this.type
    Definition Classes
    Data
  200. def setAllTo(value: Bool): BitVector.this.type

    Set all bits to value

  201. def setAllTo(value: Boolean): BitVector.this.type

    Set all bits to value

  202. def setAsAnalog(): BitVector.this.type
    Definition Classes
    BaseType → Data
  203. def setAsComb(): BitVector.this.type

    Set baseType to Combinatorial

    Set baseType to Combinatorial

    Definition Classes
    BaseType → Data
  204. def setAsDirectionLess(): BitVector.this.type

    Remove the direction (in, out, inout) to a signal

    Remove the direction (in, out, inout) to a signal

    Definition Classes
    BaseType → Data
  205. def setAsReg(): BitVector.this.type

    Set baseType to reg

    Set baseType to reg

    Definition Classes
    BaseType → Data
  206. def setAsTypeNode(): BitVector.this.type

    Set baseType to Node

    Set baseType to Node

    Definition Classes
    BaseType
  207. def setAsVital(): BitVector.this.type

    Set the baseType to vital

    Set the baseType to vital

    Definition Classes
    BaseType
  208. def setCompositeName(nameable: Nameable, postfix: String, namePriority: Byte): BitVector.this.type
    Definition Classes
    Nameable
  209. def setCompositeName(nameable: Nameable, postfix: String, weak: Boolean): BitVector.this.type
    Definition Classes
    Nameable
  210. def setCompositeName(nameable: Nameable, postfix: String): BitVector.this.type
    Definition Classes
    Nameable
  211. def setCompositeName(nameable: Nameable, namePriority: Byte): BitVector.this.type
    Definition Classes
    Nameable
  212. def setCompositeName(nameable: Nameable, weak: Boolean): BitVector.this.type
    Definition Classes
    Nameable
  213. def setCompositeName(nameable: Nameable): BitVector.this.type
    Definition Classes
    Nameable
  214. def setLambdaName(isNameBody: ⇒ Boolean)(nameGen: ⇒ String): BitVector.this.type
    Definition Classes
    Nameable
  215. def setName(name: String, namePriority: Byte): BitVector.this.type
    Definition Classes
    Nameable
  216. def setName(name: String, weak: Boolean): BitVector.this.type
    Definition Classes
    Nameable
  217. def setName(name: String): BitVector.this.type
    Definition Classes
    Nameable
  218. def setNameAsWeak(): BitVector.this.type
    Definition Classes
    Nameable
  219. def setOutputAsReg(): BitVector.this.type

    Recursively set baseType to reg only for output

    Recursively set baseType to reg only for output

    Definition Classes
    Data
  220. def setPartialName(name: String, namePriority: Byte, owner: Any): BitVector.this.type
    Definition Classes
    Nameable
  221. def setPartialName(name: String, namePriority: Byte): BitVector.this.type
    Definition Classes
    Nameable
  222. def setPartialName(name: String, weak: Boolean): BitVector.this.type
    Definition Classes
    Nameable
  223. def setPartialName(owner: Nameable, name: String, namePriority: Byte): BitVector.this.type
    Definition Classes
    Nameable
  224. def setPartialName(owner: Nameable, name: String, weak: Boolean): BitVector.this.type
    Definition Classes
    Nameable
  225. def setPartialName(name: String): BitVector.this.type
    Definition Classes
    Nameable
  226. def setPartialName(owner: Nameable, name: String): BitVector.this.type
    Definition Classes
    Nameable
  227. def setPartialName(owner: Nameable): BitVector.this.type
    Definition Classes
    Nameable
  228. def setRefOwner(that: Any): Unit
    Definition Classes
    OwnableRef
  229. def setScalaLocated(source: ScalaLocated): BitVector.this.type
    Definition Classes
    ScalaLocated
  230. def setWeakName(name: String): BitVector.this.type
    Definition Classes
    Nameable
  231. def setWidth(width: Int): BitVector.this.type

    Set the width of the BitVector

    Set the width of the BitVector

    width

    the width of the data

    returns

    the BitVector of a given size

  232. def simplifyNode: Expression
    Definition Classes
    Expression
  233. def sliceBy(divisor: List[Int]): List[Bits]
  234. def sliceBy(divisor: Int*): List[Bits]

    apart by a list of width

    apart by a list of width

    returns

    (List(A(1 downto 0), A(2 downto 4), A(9 downto 3))

    Example: 

    1. val res = A.sliceBy(2, 3, 5)
val res = A.sliceBy(List(2, 3, 5))
  235. def spinalTags: LinkedHashSet[SpinalTag]
    Definition Classes
    SpinalTagReady
  236. def splitAt(n: Int): (Bits, Bits)

    Split at n st bits

    Split at n st bits

    returns

    (data10bits(8 downto 4), data10bits(3 downto 0))

    Example: 

    1. val res = data10bits.splitAt(4)
  237. def stabilized(func: (Expression) ⇒ Expression, seed: Expression): Expression
    Definition Classes
    ExpressionContainer
  238. def subdivideIn(sliceWidth: BitCount): Vec[T]
  239. def subdivideIn(sliceCount: SlicesCount): Vec[T]
  240. def subdivideIn(sliceWidth: BitCount, strict: Boolean): Vec[T]

    Split the BitVector into slice of x bits

    Split the BitVector into slice of x bits

    sliceWidth

    the width of the slice

    strict

    allow subdivideIn to generate vectors with varying size

    returns

    a Vector of slices

    Example: 

    1. val res = myBits.subdivideIn(3 bits)
  241. def subdivideIn(sliceCount: SlicesCount, strict: Boolean): Vec[T]

    Split the BitVector into x slice

    Split the BitVector into x slice

    sliceCount

    the width of the slice

    strict

    allow subdivideIn to generate vectors with varying size

    returns

    a Vector of slices

    Example: 

    1. val res = myBits.subdivideIn(3 slices)
  242. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  243. def take(n: Int): Bits

    Take lowest n bits

    Take lowest n bits

    returns

    data10bits(3 downto 0)

    Example: 

    1. val res = data10bits.take(4)
  244. def takeHigh(n: Int): Bits

    Take highest n bits

    Take highest n bits

    returns

    data10bits(9 downto 6)

    Example: 

    1. val res = data10bits.takeHigh(4)
  245. def takeLow(n: Int): Bits
  246. def toIo(): BitVector.this.type
    Definition Classes
    Data
  247. def toMuxInput[T <: Data](muxOutput: T): T
    Definition Classes
    Data
  248. def toString(): String
    Definition Classes
    BitVector → BaseType → Expression → Nameable → AnyRef → Any
  249. def toStringMultiLine(): String
    Definition Classes
    BaseNode
  250. def toStringRec(level: Int = 1): String
    Definition Classes
    Expression
  251. def unfreeze(): BitVector.this.type
    Definition Classes
    BaseType → Data
  252. def unsetName(): BitVector.this.type
    Definition Classes
    Nameable
  253. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  254. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native()
  255. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  256. def walkDrivingExpressions(func: (Expression) ⇒ Unit): Unit
    Definition Classes
    ExpressionContainer
  257. def walkExpression(func: (Expression) ⇒ Unit): Unit
    Definition Classes
    ExpressionContainer
  258. def walkExpressionPostorder(func: (Expression) ⇒ Unit): Unit
    Definition Classes
    ExpressionContainer
  259. def walkParentTreeStatements(func: (TreeStatement) ⇒ Unit): Unit
    Definition Classes
    Statement
  260. def walkParentTreeStatementsUntilRootScope(func: (TreeStatement) ⇒ Unit): Unit
    Definition Classes
    Statement
  261. def walkRemapDrivingExpressions(func: (Expression) ⇒ Expression): Unit
    Definition Classes
    ExpressionContainer
  262. def walkRemapExpressions(func: (Expression) ⇒ Expression): Unit
    Definition Classes
    ExpressionContainer
  263. def wrapCast[T <: BaseType](result: T, node: Cast): T
    Definition Classes
    BaseType
  264. def wrapNext(): BitVector.this.type
    Definition Classes
    Data
  265. def xorMask(that: Bool): BitVector.this.type
  266. def xorR: Bool

    Hardware logical XOR of all bits

    Hardware logical XOR of all bits

    Equivalent to this.asBools.reduce(_ ^ _).

Deprecated Value Members

  1. def asDirectionLess(): BitVector.this.type
    Definition Classes
    Data
    Annotations
    @deprecated
    Deprecated

    (Since version ???) use setAsDirectionLess instead

  2. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] ) @Deprecated
    Deprecated
  3. def genIf(cond: Boolean): BitVector.this.type

    Generate this if condition is true

    Generate this if condition is true

    Definition Classes
    Data
    Annotations
    @deprecated
    Deprecated

    does not work with <>, use 'someBool generate Type()' or 'if(condition) Type() else null' instead

  4. def range: Range

    Return the range

    Return the range

    Annotations
    @deprecated
    Deprecated

    Use bitsRange instead

Inherited from Widthable

Inherited from WidthProvider

Inherited from BaseType

Inherited from Expression

Inherited from StatementDoubleLinkedContainer[BaseType, AssignmentStatement]

Inherited from DoubleLinkedContainer[BaseType, AssignmentStatement]

Inherited from DeclarationStatement

Inherited from LeafStatement

Inherited from Statement

Inherited from BaseNode

Inherited from ExpressionContainer

Inherited from Data

Inherited from InComponent

Inherited from OverridedEqualsHashCode

Inherited from SpinalTagReady

Inherited from Assignable

Inherited from NameableByComponent

Inherited from Nameable

Inherited from OwnableRef

Inherited from ContextUser

Inherited from ScalaLocated

Inherited from GlobalDataUser

Inherited from AnyRef

Inherited from Any

Ungrouped