package sim
Simulation package
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Type Members
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implicit
class
SimBaseTypePimper extends AnyRef
Add implicit function to BaseType for simulation
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implicit
class
SimBitVectorPimper extends AnyRef
Add implicit function to BitVector
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implicit
class
SimBitsPimper extends AnyRef
Add implicit function to Bits
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implicit
class
SimBoolPimper extends AnyRef
Add implicit function to Bool
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implicit
class
SimClockDomainPimper extends AnyRef
Add implicit function to ClockDomain
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class
SimCompiled[T <: Component] extends AnyRef
Run simulation
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case class
SimConfigLegacy[T <: Component](_rtlGen: Option[() ⇒ T] = None, _spinalConfig: SpinalConfig = SpinalConfig(), _spinalReport: Option[SpinalReport[T]] = None) extends Product with Serializable
Legacy simulation configuration
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implicit
class
SimDataPimper[T <: Data] extends AnyRef
Add implicit function to Data
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implicit
class
SimEnumPimper[T <: SpinalEnum] extends AnyRef
Add implicit function to Enum
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implicit
class
SimSIntPimper extends AnyRef
Add implicit function to SInt
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implicit
class
SimUIntPimper extends AnyRef
Add implicit function to UInt
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case class
SpinalSimConfig(_workspacePath: String = ..., _workspaceName: String = null, _waveDepth: Int = 0, _spinalConfig: SpinalConfig = SpinalConfig(), _optimisationLevel: Int = 0, _simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), _additionalRtlPath: ArrayBuffer[String] = ArrayBuffer[String](), _waveFormat: WaveFormat = WaveFormat.NONE) extends Product with Serializable
SpinalSim configuration
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case class
SpinalVerilatorBackendConfig[T <: Component](rtl: SpinalReport[T], waveFormat: WaveFormat = WaveFormat.NONE, workspacePath: String = "./", workspaceName: String = null, vcdPath: String = null, vcdPrefix: String = null, waveDepth: Int = 0, optimisationLevel: Int = 2, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String]()) extends Product with Serializable
Backend configuration for verilator
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class
SwapTagPhase extends PhaseNetlist
Swap all oldTag with newTag
- type suspendable = sim.suspendable
Value Members
- def SimConfig: SpinalSimConfig
- def delayed(delay: Long)(body: ⇒ Unit): Unit
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def
fork(body: ⇒ Unit): SimThread
Fork
- def forkJoin(bodys: () ⇒ Unit*): Unit
- def forkSensitive(block: ⇒ Unit): Unit
- def forkSensitiveWhile(block: ⇒ Boolean): Unit
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def
setBigInt(bt: BaseType, value: BigInt): Unit
Set a BigInt value to a BaseType
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def
setLong(bt: BaseType, value: Long): Unit
Set a long value to a BaseType
- def simDeltaCycle(): Long
- def simFailure(message: String = ""): Unit
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def
simSuccess(): Unit
Success/Failure simulation
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def
simTime(): Long
Return the current simulation time
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def
sleep(cycles: Long): Unit
Sleep / WaitUntil
- def waitUntil(cond: ⇒ Boolean): Unit
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object
DoClock
Generate a clock
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object
DoReset
Execute a reset sequence
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object
ForkClock
Fork the DoClock
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object
SimPublic extends SpinalTag
Tag SimPublic
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object
SimSpeedPrinter
Print the simulation speed
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object
SimTimeout
Create a Timeout for the simulation
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object
SimWorkspace
Simulation Workspace
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object
SpinalVerilatorBackend
Backend verilator
- object SpinalVerilatorSim
Deprecated Value Members
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def
SimConfig[T <: Component](rtl: SpinalReport[T]): SimConfigLegacy[T]
- Annotations
- @deprecated
- Deprecated
(Since version ???) Use SimConfig.???.compile(new Dut) instead
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def
SimConfig[T <: Component](rtl: ⇒ T): SimConfigLegacy[T]
- Annotations
- @deprecated
- Deprecated
(Since version ???) Use SimConfig.???.compile(new Dut) instead