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package core

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  1. core
  2. BaseTypeCast
  3. UFixCast
  4. SFixCast
  5. BaseTypeFactory
  6. UFixFactory
  7. SFixFactory
  8. TypeFactory
  9. VecFactory
  10. SIntFactory
  11. UIntFactory
  12. BitsFactory
  13. BoolFactory
  14. AnyRef
  15. Any
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Type Members

  1. trait Area extends Nameable with ContextUser with OwnableRef with ScalaLocated

    Sometime, creating a Component to define some logic is overkill.

    Sometime, creating a Component to define some logic is overkill. For this kind of cases you can use Area to define a group of signals/logic.

    Example: 

    1. val tickConter = new Area{
  val tick = Reg(UInt(8 bits) init(0)
  tick := tick + 1
}
    See also

    Area Documentation

  2. trait AssertNodeSeverity extends AnyRef
  3. trait Assignable extends AnyRef

    Assignable trait

  4. trait Attribute extends SpinalTag
  5. class AttributeFlag extends Attribute
  6. sealed trait AttributeKind extends AnyRef
  7. class AttributeString extends Attribute
  8. abstract class BaseType extends Data with DeclarationStatement with StatementDoubleLinkedContainer[BaseType, AssignmentStatement] with Expression

    Abstract base class of all Spinal types

  9. trait BaseTypeCast extends SFixCast with UFixCast

    Base type Cast

  10. trait BaseTypeFactory extends BoolFactory with BitsFactory with UIntFactory with SIntFactory with VecFactory with SFixFactory with UFixFactory

    Base type factory

  11. implicit class BigDecimalBuilder extends AnyRef

    BigDecimal Builder

  12. case class BigIntBuilder(i: BigInt) extends Product with Serializable

    BigInt Builder

  13. case class BitCount(value: Int) extends Product with Serializable

    Represent the number of bit of a data

  14. abstract class BitVector extends BaseType with Widthable

    BitVector is a family of types for storing multiple bits of information in a single value.

    BitVector is a family of types for storing multiple bits of information in a single value. This type has three subtypes that can be used to model different behaviours:

    • Bits
    • UInt (unsigned integer)
    • SInt (signed integer)
    See also

    BitVector Documentation

  15. abstract class BitVectorLiteralFactory[T <: BitVector] extends AnyRef

    Base class to create Bit Vector from literal

  16. class Bits extends BitVector with DataPrimitives[Bits] with BitwiseOp[Bits]

    The Bits type corresponds to a vector of bits that does not convey any arithmetic meaning.

    The Bits type corresponds to a vector of bits that does not convey any arithmetic meaning.

    Example: 

    1. val myBits1 = Bits(32 bits)
val myBits2 = B(25, 8 bits)
val myBits3 = B"8'xFF"
val myBits4 = B"1001_0011
    See also

    Bits Documentation

  17. trait BitsFactory extends AnyRef

    Bits factory used for instance by the IODirection to create a in/out Bits

  18. trait BitwiseOp[T <: Data] extends AnyRef

    Bitwise Operation

    Bitwise Operation

    T

    the type which is associated with the bitwise operation

  19. abstract class BlackBox extends Component

    A blackbox allows the user to integrate an existing VHDL/Verilog component into the design by just specifying the interfaces.

    A blackbox allows the user to integrate an existing VHDL/Verilog component into the design by just specifying the interfaces.

    Example: 

    1.  class Ram_1w_1r(wordWidth: Int, wordCount: Int) extends BlackBox {
     val generic = new Generic {
         val wordCount = Ram_1w_1r.this.wordCount
         val wordWidth = Ram_1w_1r.this.wordWidth
     }
     val io = new Bundle {
         val clk = in Bool
         val wr = new Bundle {
             val en   = in Bool
             val addr = in UInt (log2Up(wordCount) bit)
             val data = in Bits (wordWidth bit)
         }
         val rd = new Bundle {
             val en   = in Bool
             val addr = in UInt (log2Up(wordCount) bit)
             val data = out Bits (wordWidth bit)
         }
     }
     mapClockDomain(clock=io.clk)
}
  20. abstract class BlackBoxULogic extends BlackBox

    Create a blackBox with std_ulogic instead of std_logic

  21. class Bool extends BaseType with DataPrimitives[Bool] with BitwiseOp[Bool]

    The Bool type corresponds to a boolean value (True or False)

    The Bool type corresponds to a boolean value (True or False)

    Example: 

    1. val myBool = Bool()
myBool := False
myBool := Bool(false)
    See also

    Bool Documentation

  22. case class BoolEdges() extends Bundle with Product with Serializable

    Bundle for the edge detection

  23. trait BoolFactory extends AnyRef

    Bool factory used for instance by the IODirection to create a in/out Bool

  24. class Bundle extends MultiData with Nameable

    The Bundle is a composite type that defines a group of named signals (of any SpinalHDL basic type) under a single name.

    The Bundle is a composite type that defines a group of named signals (of any SpinalHDL basic type) under a single name. The Bundle can be used to model data structures, buses and interfaces.

    Example: 

    1. val cmd = new Bundle{
  val init   = in Bool
  val start  = in Bool
  val result = out Bits(32 bits)
}
    See also

    Bundle Documentation

  25. class BundleCase extends Bundle
  26. case class ClockDomain(clock: Bool, reset: Bool = null, dummyArg: DummyTrait = null, softReset: Bool = null, clockEnable: Bool = null, config: ClockDomainConfig = GlobalData.get.commonClockConfig, frequency: ClockFrequency = UnknownFrequency(), clockEnableDivisionRate: DivisionRate = ClockDomain.UnknownDivisionRate()) extends Product with Serializable

    clock and reset signals can be combined to create a clock domain.

    clock and reset signals can be combined to create a clock domain. Clock domains could be applied to some area of the design and then all synchronous elements instantiated into this area will then implicitly use this clock domain. Clock domain application work like a stack, which mean, if you are in a given clock domain, you can still apply another clock domain locally

    See also

    ClockDomain Documentation

  27. sealed trait ClockDomainBoolTag extends SpinalTag
  28. case class ClockDomainConfig(clockEdge: EdgeKind = RISING, resetKind: ResetKind = ASYNC, resetActiveLevel: Polarity = HIGH, softResetActiveLevel: Polarity = HIGH, clockEnableActiveLevel: Polarity = HIGH) extends Product with Serializable
  29. case class ClockDomainTag(clockDomain: ClockDomain) extends SpinalTag with Product with Serializable
  30. class ClockEnableArea extends Area with DelayedInit

    Clock Area with a specila clock enable

  31. case class ClockEnableTag(clockDomain: ClockDomain) extends ClockDomainBoolTag with Product with Serializable
  32. case class ClockTag(clockDomain: ClockDomain) extends ClockDomainBoolTag with Product with Serializable
  33. class ClockingArea extends Area with DelayedInit

    Clock domains could be applied to some area of the design and then all synchronous elements instantiated into this area will then implicitly use this clock domain.

    Clock domains could be applied to some area of the design and then all synchronous elements instantiated into this area will then implicitly use this clock domain.

    See also

    ClockDomain Documentation

  34. abstract class Component extends NameableByComponent with ContextUser with ScalaLocated with DelayedInit with Stackable with OwnableRef with SpinalTagReady with OverridedEqualsHashCode

    Abstract class used to create a new Component

    Abstract class used to create a new Component

    Example: 

    1. class MyAndGate extends Component {
  val io = new Bundle{
    val a,b = in Bool
    val res = out Bool
  }
  io.res := io.a & io.b
}
    See also

    Component Documentation

  35. trait ConditionalContext extends GlobalDataUser
  36. trait ContextUser extends GlobalDataUser with ScalaLocated
  37. case class CyclesCount(value: BigInt) extends Product with Serializable

    Cycles number representation

  38. trait Data extends ContextUser with NameableByComponent with Assignable with SpinalTagReady with GlobalDataUser with ScalaLocated with OwnableRef with OverridedEqualsHashCode
  39. class DataPimper[T <: Data] extends DataPrimitives[T]

    Should not extends AnyVal, Because it create kind of strange call stack move that make error reporting miss accurate

  40. trait DataPrimitives[T <: Data] extends AnyRef
  41. trait DataWrapper extends Data
  42. class DefaultTag extends SpinalTag
  43. case class Device(vendor: String = "?", family: String = "?", name: String = "?") extends Product with Serializable

    target device

  44. class DontName extends Annotation with Annotation with ClassfileAnnotation
  45. case class DoubleBuilder(d: Double) extends Product with Serializable

    Double Builder

  46. trait DummyTrait extends AnyRef
  47. case class DumpWaveConfig(depth: Int = 0, vcdPath: String = "wave.vcd") extends Product with Serializable
  48. sealed trait EdgeKind extends AnyRef
  49. class ElseWhenClause extends AnyRef
  50. implicit class ElseWhenClauseBuilder extends AnyRef

    Implicit clause builder for elseWhen

  51. class EnumLiteral[T <: SpinalEnum] extends Literal with InferableEnumEncodingImpl

    Node representation which contains the value of an SpinalEnumElement

  52. class EnumPoison extends Literal with InferableEnumEncodingImpl
  53. case class ExpNumber(value: Int) extends Product with Serializable

    Exponent representation

  54. class ExternalDriverTag extends SpinalTag
  55. type FixedFrequency = core.ClockDomain.FixedFrequency
  56. class GenerationFlags extends AnyRef
  57. class Generic extends AnyRef

    Create a generic for a BlackBox

    Create a generic for a BlackBox

    Example: 

    1. class myMemory(sizeMem: Int) extends BlackBox{
    val generic = new Generic{
     val size = sizeMem
    }
    val io = new Bundle { ... }
}
  58. class GlobalData extends AnyRef

    Global data

  59. trait GlobalDataUser extends AnyRef

    Get a link to the globalData

  60. class HardType[T <: Data] extends AnyRef
  61. case class HertzNumber(v: BigDecimal) extends PhysicalNumber[HertzNumber] with Product with Serializable

    Frequency representation

  62. type IClockDomainFrequency = ClockFrequency
  63. trait IODirection extends BaseTypeFactory

    Trait used to set the direction of a data

  64. class IfDefTag extends SpinalTag
  65. abstract class ImplicitArea[T] extends Area

    Create an Area which can be assign to a data

    Create an Area which can be assign to a data

    Example: 

    1. class Counter extends ImplicitArea[UInt]{
   val cnt = Reg(UInt(8 bits)
   ...
   override def implicitValue: UInt = cnt
}
val myCounter = Counter()
io.myUInt = myCounter
  66. final class IntBuilder extends AnyVal

    Integer Builder

  67. sealed trait Language extends AnyRef
  68. implicit class LiteralBuilder extends AnyRef

    Literal builder S/U/B"e.g. : B"8'xFF"

  69. class MaskedBoolean extends AnyRef

    Masked Literal

    Masked Literal

    Example: 

    1. val itMatch = myBits === M"00--10--" // - don't care value
  70. class MaskedLiteral extends AnyRef
  71. class Mem[T <: Data] extends DeclarationStatement with StatementDoubleLinkedContainer[Mem[_], MemPortStatement] with WidthProvider with SpinalTagReady
  72. trait MemBlackboxingPolicy extends AnyRef
  73. trait MemPortStatement extends LeafStatement with StatementDoubleLinkedContainerElement[Mem[_], MemPortStatement]
  74. class MemReadAsync extends MemPortStatement with WidthProvider with SpinalTagReady with ContextUser with Expression
  75. class MemReadSync extends MemPortStatement with WidthProvider with SpinalTagReady with ContextUser with Expression
  76. class MemReadWrite extends MemPortStatement with WidthProvider with SpinalTagReady with ContextUser with Expression
  77. trait MemTechnologyKind extends AnyRef
  78. class MemWrite extends MemPortStatement with WidthProvider with SpinalTagReady
  79. class MemWritePayload[T <: Data] extends Bundle
  80. trait MinMaxProvider extends AnyRef

    Min max base function

  81. abstract class MultiData extends Data

    Base class for multi data like Vec, Bundle

  82. trait Nameable extends OwnableRef with ContextUser
  83. trait NameableByComponent extends Nameable with GlobalDataUser
  84. class NamingScope extends AnyRef
  85. trait Num[T <: Data] extends AnyRef

    Base operations for numbers

    Base operations for numbers

    T

    the type which is associated with the base operation

  86. trait OverridedEqualsHashCode extends AnyRef
  87. trait OwnableRef extends AnyRef
  88. abstract class PhysicalNumber[T <: PhysicalNumber[_]] extends AnyRef

    Base class for the Physical representation (Hertz, Time, ...)

  89. sealed trait Polarity extends AnyRef
  90. case class PosCount(value: Int) extends Product with Serializable

    Position representation

  91. class Ram_1w_1ra extends BlackBox

    Ram 1w 1ra

  92. class Ram_1w_1rs extends BlackBox

    Ram 1w 1rs

  93. class Ram_1wors extends BlackBox

    Ram 1wors

  94. class Ram_1wrs extends BlackBox

    Ram 1wrs

  95. class Ram_2c_1w_1rs extends BlackBox

    Ram 2c 1w 1rs

  96. class Ram_2wrs extends BlackBox

    Ram 2wrs

  97. implicit class RangePimper extends AnyRef

    Implicit Range helper

  98. trait ReadUnderWritePolicy extends AnyRef
  99. case class Ref[T](value: T) extends Product with Serializable

    Use to give value by reference to a function

  100. class ResetArea extends Area with DelayedInit

    ResetArea allow to reset an area with a special reset combining with the current reset (cumulative)

  101. sealed trait ResetKind extends AnyRef
  102. case class ResetTag(clockDomain: ClockDomain) extends ClockDomainBoolTag with Product with Serializable
  103. class SFix extends XFix[SFix, SInt]

    Signed fix point

    Signed fix point

    See also

    SFix Documentation

  104. class SFix2D extends Bundle
  105. trait SFixCast extends AnyRef
  106. trait SFixFactory extends TypeFactory
  107. class SInt extends BitVector with Num[SInt] with MinMaxProvider with DataPrimitives[SInt] with BitwiseOp[SInt]

    The SInt type corresponds to a vector of bits that can be used for signed integer arithmetic.

    The SInt type corresponds to a vector of bits that can be used for signed integer arithmetic.

    Example: 

    1. val mySInt = SInt(8 bits)
mySInt    := S(4, 8 bits) + S"0000_1111"
mySInt    := S(4) - S"h1A"
    See also

    SInt Documentation

  108. trait SIntFactory extends AnyRef

    SInt factory used for instance by the IODirection to create a in/out SInt

  109. implicit class SIntPimper extends AnyRef

    Implicit SInt helper

  110. class SafeStack[T] extends AnyRef

    Safe Stack

  111. class SafeStackWithStackable[T <: Stackable] extends SafeStack[T]
  112. trait ScalaLocated extends GlobalDataUser
  113. case class SlicesCount(value: Int) extends Product with Serializable

    Slice size representation

  114. class SlowArea extends ClockingArea

    Define a clock domain which is x time slower than the current clock

  115. case class SpinalConfig(mode: SpinalMode = null, flags: HashSet[Any] = mutable.HashSet[Any](), debugComponents: HashSet[Class[_]] = mutable.HashSet[Class[_]](), keepAll: Boolean = false, defaultConfigForClockDomains: ClockDomainConfig = ClockDomainConfig(), onlyStdLogicVectorAtTopLevelIo: Boolean = false, defaultClockDomainFrequency: IClockDomainFrequency = UnknownFrequency(), targetDirectory: String = ".", oneFilePerComponent: Boolean = false, netlistFileName: String = null, dumpWave: DumpWaveConfig = null, globalPrefix: String = "", privateNamespace: Boolean = false, formalAsserts: Boolean = false, anonymSignalPrefix: String = null, device: Device = Device(), inlineRom: Boolean = false, genVhdlPkg: Boolean = true, verbose: Boolean = false, mergeAsyncProcess: Boolean = true, asyncResetCombSensitivity: Boolean = false, anonymSignalUniqueness: Boolean = false, noRandBoot: Boolean = false, randBootFixValue: Boolean = true, noAssert: Boolean = false, phasesInserters: ArrayBuffer[(ArrayBuffer[Phase]) ⇒ Unit] = ..., transformationPhases: ArrayBuffer[Phase] = ArrayBuffer[Phase](), memBlackBoxers: ArrayBuffer[Phase] = ..., rtlHeader: String = null, _withEnumString: Boolean = true) extends Product with Serializable

    Spinal configuration for the generation of the RTL

  116. class SpinalEnum extends Nameable with ScalaLocated

    Base class for creating enumeration

    Base class for creating enumeration

    Example: 

    1. object MyEnum extends SpinalEnum(binarySequential){
  val s1, s2, s3, s4 = newElement()
}

      SpinalEnum contains a list of SpinalEnumElement that is the definition of an element. SpinalEnumCraft is the hardware representation of the the element.

    See also

    Enumeration Documentation

  117. class SpinalEnumCraft[T <: SpinalEnum] extends BaseType with InferableEnumEncodingImpl with DataPrimitives[SpinalEnumCraft[T]]

    Hardware representation of an enumeration

  118. class SpinalEnumElement[T <: SpinalEnum] extends Nameable

    Definition of an element of the enumeration

  119. trait SpinalEnumEncoding extends Nameable with ScalaLocated

    Trait to define an encoding

  120. class SpinalExit extends Exception
  121. trait SpinalMode extends AnyRef
  122. class SpinalReport[T <: Component] extends AnyRef

    Spinal report give after the generation of the RTL

  123. trait SpinalTag extends AnyRef
  124. trait SpinalTagReady extends AnyRef
  125. trait Stackable extends AnyRef
  126. class SwitchContext extends AnyRef
  127. case class TimeNumber(v: BigDecimal) extends PhysicalNumber[TimeNumber] with Product with Serializable

    Time representation

  128. trait TypeFactory extends AnyRef
  129. class UFix extends XFix[UFix, UInt]

    Unsigned fix point

    Unsigned fix point

    See also

    UFix Documentation

  130. class UFix2D extends Bundle

    Two-dimensional XFix

  131. trait UFixCast extends AnyRef
  132. trait UFixFactory extends TypeFactory
  133. class UInt extends BitVector with Num[UInt] with MinMaxProvider with DataPrimitives[UInt] with BitwiseOp[UInt]

    The UInt type corresponds to a vector of bits that can be used for unsigned integer arithmetic.

    The UInt type corresponds to a vector of bits that can be used for unsigned integer arithmetic.

    Example: 

    1. val myUInt = UInt(8 bits)
 myUInt := U(2,8 bits)
 myUInt := U(2)
 myUInt := U"0000_0101"
 myUInt := U"h1A"
    See also

    UInt Documentation

  134. case class UInt2D(xBitCount: BitCount, yBitCount: BitCount) extends Bundle with Product with Serializable

    Define an UInt 2D point

    Define an UInt 2D point

    xBitCount

    width of the x point

    yBitCount

    width of the y point

    Example: 

    1. val positionOnScreen = Reg(UInt2D(log2Up(p.screenResX) bits, log2Up(p.screenResY) bits))
  135. trait UIntFactory extends AnyRef

    UInt factory used for instance by the IODirection to create a in/out UInt

  136. implicit class UIntPimper extends AnyRef

    Implicit UInt helper

  137. type UnknownFrequency = core.ClockDomain.UnknownFrequency
  138. class Vec[T <: Data] extends MultiData with IndexedSeq[T]

    The Vec is a composite type that defines a group of indexed signals (of any SpinalHDL basic type) under a single name

    The Vec is a composite type that defines a group of indexed signals (of any SpinalHDL basic type) under a single name

    Example: 

    1. val myVecOfSInt = Vec(SInt(8 bits), 2)
    See also

    Vec Documentation

  139. class VecAccessAssign[T <: Data] extends Assignable
  140. trait VecFactory extends AnyRef

    Vec factory

  141. class VecBuilder extends AnyRef
    Definition Classes
    VecFactory
  142. class WhenContext extends ConditionalContext with ScalaLocated

    else / else if statement

    else / else if statement

    See also

    when Documentation

  143. abstract class XFix[T <: XFix[T, R], R <: BitVector with Num[R]] extends MultiData

    Base class for SFix and UFix

  144. type dontName = spinal.core.DontName @scala.annotation.meta.field

Value Members

  1. implicit def BigIntToBits(that: BigInt): Bits
  2. implicit def BigIntToBuilder(value: BigInt): BigIntBuilder
  3. implicit def BigIntToSInt(that: BigInt): SInt
  4. implicit def BigIntToUInt(that: BigInt): UInt
  5. def Bits(width: BitCount): Bits

    Create a new Bits of a given width

    Create a new Bits of a given width

    Definition Classes
    BitsFactory
  6. def Bits(): Bits

    Create a new Bits

    Create a new Bits

    Definition Classes
    BitsFactory
  7. def Bool(value: Boolean): Bool

    Create a new Bool initialized with a boolean value

    Create a new Bool initialized with a boolean value

    Definition Classes
    BoolFactory
  8. def Bool(): Bool

    Create a new Bool

    Create a new Bool

    Definition Classes
    BoolFactory
  9. implicit def BooleanPimped[T <: Data](that: Boolean): BooleanPimped
  10. implicit def DataPimped[T <: Data](that: T): DataPimper[T]

    Implicit Data helper

  11. implicit def DoubleToBuilder(value: Double): DoubleBuilder
  12. implicit def EnumCtoEnumC2[T <: SpinalEnum, T2 <: T](craft: SpinalEnumCraft[T2]): SpinalEnumCraft[T]
  13. implicit def EnumCtoEnumC3[T <: SpinalEnum, T2 <: T](craft: SpinalEnumCraft[T]): SpinalEnumCraft[T2]
  14. implicit def EnumElementToCraft[T <: SpinalEnum](element: SpinalEnumElement[T]): SpinalEnumCraft[T]
  15. implicit def EnumEtoEnumE2[T <: SpinalEnum, T2 <: T](element: SpinalEnumElement[T2]): SpinalEnumElement[T]

    Implicit enum conversion

  16. implicit def EnumEtoEnumE3[T <: SpinalEnum, T2 <: T](element: SpinalEnumElement[T]): SpinalEnumElement[T2]
  17. def False: Bool
  18. def FixedFrequency(value: HertzNumber): core.ClockDomain.FixedFrequency
  19. implicit def IntToBits(that: Int): Bits
  20. implicit def IntToBuilder(value: Int): IntBuilder

    Implicit Int/BigInt/Double to Builder

  21. implicit def IntToSInt(that: Int): SInt
  22. implicit def IntToUInt(that: Int): UInt

    Implicit conversion from Int/BigInt/String to UInt/SInt/Bits

  23. def SFix(peak: ExpNumber, resolution: ExpNumber): SFix
    Definition Classes
    SFixFactory
  24. def SFix(peak: ExpNumber, width: BitCount): SFix
    Definition Classes
    SFixFactory
  25. def SInt(width: BitCount): SInt

    Create a new SInt of a given width

    Create a new SInt of a given width

    Definition Classes
    SIntFactory
  26. def SInt(): SInt

    Create a new SInt

    Create a new SInt

    Definition Classes
    SIntFactory
  27. implicit def StringToBits(that: String): Bits
  28. implicit def StringToSInt(that: String): SInt
  29. implicit def StringToUInt(that: String): UInt
  30. def True: Bool

    True / False definition

  31. def UFix(peak: ExpNumber, resolution: ExpNumber): UFix
    Definition Classes
    UFixFactory
  32. def UFix(peak: ExpNumber, width: BitCount): UFix
    Definition Classes
    UFixFactory
  33. def UInt(width: BitCount): UInt

    Create a new UInt of a given width

    Create a new UInt of a given width

    Definition Classes
    UIntFactory
  34. def UInt(): UInt

    Create a new UInt

    Create a new UInt

    Definition Classes
    UIntFactory
  35. def UnknownFrequency(): core.ClockDomain.UnknownFrequency
  36. def Vec[T <: Data](firstElement: T, followingElements: T*): Vec[T]
    Definition Classes
    VecFactory
  37. def Vec[T <: Data](gen: ⇒ T, size: Int): Vec[T]
    Definition Classes
    VecFactory
  38. def Vec[T <: Data](elements: TraversableOnce[T], dataType: HardType[T] = null): Vec[T]
    Definition Classes
    VecFactory
  39. val Vec: VecBuilder
    Definition Classes
    VecFactory
  40. def assert(assertion: Bool, message: Seq[Any], severity: AssertNodeSeverity): AssertStatement
  41. def assert(assertion: Bool, message: String, severity: AssertNodeSeverity): AssertStatement
  42. def assert(assertion: Bool, message: Seq[Any]): AssertStatement
  43. def assert(assertion: Bool, message: String): AssertStatement
  44. def assert(assertion: Bool, severity: AssertNodeSeverity): AssertStatement
  45. def assert(assertion: Bool): AssertStatement
  46. final def assert(assertion: Boolean, message: ⇒ Any): Unit
    Annotations
    @elidable( ASSERTION ) @inline()
  47. def assert(assertion: Boolean): Unit

    Assertion

    Assertion

    Annotations
    @elidable( ASSERTION )
  48. def assume(assertion: Bool): AssertStatement
  49. def cover(assertion: Bool): AssertStatement
  50. implicit lazy val implicitConversions: implicitConversions

    Scala implicit

  51. def postTypeFactory[T <: Data](that: T): T
    Definition Classes
    TypeFactory
  52. implicit lazy val postfixOps: postfixOps
  53. implicit lazy val reflectiveCalls: reflectiveCalls
  54. def report(message: Seq[Any], severity: AssertNodeSeverity): AssertStatement
  55. def report(message: String, severity: AssertNodeSeverity): AssertStatement
  56. def report(message: Seq[Any]): AssertStatement
  57. def report(message: String): AssertStatement
  58. object ASYNC extends ResetKind
  59. object AllowMixedWidth extends SpinalTag
  60. object Analog

    Set a data to Analog

  61. object AnnotationUtils
  62. object ArrayManager
  63. object B extends BitVectorLiteralFactory[Bits]

    Used to create a new Bits or cast to Bits

  64. object BOOT extends ResetKind
  65. object BaseType
  66. object COMMENT_ATTRIBUTE extends AttributeKind
  67. object Cat

    Concatenate a list of data

  68. object ClockDomain extends Serializable
  69. object CombInit

    Declare a register with an initialize value

  70. object Component
  71. object ConditionalContext
  72. object CyclesCount extends Serializable
  73. object DEFAULT_ATTRIBUTE extends AttributeKind
  74. object Data
  75. object DataAssign
  76. object Driver
  77. object ERROR extends AssertNodeSeverity
  78. object FAILURE extends AssertNodeSeverity
  79. object FALLING extends EdgeKind
  80. object Formal
  81. object GenerationFlags
  82. object GlobalData
  83. object HIGH extends Polarity
  84. object HardType
  85. object ImplicitArea
  86. object Info
  87. object InitAssign
  88. object LOW extends Polarity
  89. object Language
  90. object LocatedPendingError
  91. object MaskedLiteral
  92. object Mem
  93. object MemReadAsync
  94. object MemReadSync
  95. object MemReadWrite
  96. object MemWrite
  97. object Mux

    Mux operation

  98. object NOTE extends AssertNodeSeverity
  99. object Nameable
  100. object OwnableRef
  101. object PendingError
  102. object RISING extends EdgeKind
  103. object Reg

    Create a register

  104. object RegInit

    Declare a register with an initialize value

  105. object RegNext

    Register a signal of one clock

  106. object RegNextWhen

    Register a signal when a condition is true

  107. object S extends BitVectorLiteralFactory[SInt]

    Used to create a new SInt or cast to SInt

  108. object SF
  109. object SFix2D

    Two-dimensionnal SFix

  110. object SYNC extends ResetKind
  111. object ScalaLocated
  112. object Select
  113. object Spinal
  114. object SpinalConfig extends Serializable
  115. object SpinalEnumEncoding

    Used to create a custom encoding

    Used to create a custom encoding

    Example: 

    1. object BR extends SpinalEnum{
  val NE, EQ, J, JR = newElement()
  defaultEncoding = SpinalEnumEncoding("opt")(
      EQ -> 0,
      NE -> 1,
      J  -> 2,
      JR -> 3 )
}
  116. object SpinalError
  117. object SpinalExit extends Serializable
  118. object SpinalInfo
  119. object SpinalLog
  120. object SpinalMap

    Spinal map

  121. object SpinalProgress
  122. object SpinalSystemVerilog
  123. object SpinalTagReady
  124. object SpinalVerilog
  125. object SpinalVhdl
  126. object SpinalWarning
  127. object SystemVerilog extends SpinalMode
  128. object U extends BitVectorLiteralFactory[UInt]

    Used to create a new UInt or cast to UInt

  129. object UF
  130. object UFix2D

    Two-dimensionnal UFix

  131. object UInt2D extends Serializable
  132. object VHDL extends SpinalMode
  133. object Verilator
  134. object Verilog extends SpinalMode
  135. object WARNING extends AssertNodeSeverity
  136. object addDefaultGenericValue extends SpinalTag

    In VHDL add the generic value in the definition of the blackbox

  137. object allowAssignmentOverride extends SpinalTag
  138. object allowDirectionLessIoTag extends SpinalTag
  139. object auto extends MemTechnologyKind
  140. object binaryOneHot extends SpinalEnumEncoding

    Binary One hot encoding

    Binary One hot encoding

    Example: 

    1. 001, 010, 100
  141. object binarySequential extends SpinalEnumEncoding

    Binary Sequential

    Binary Sequential

    Example: 

    1. 000, 001, 010, 011, 100, 101, ....
  142. object blackboxAll extends MemBlackboxingPolicy
  143. object blackboxAllWhatsYouCan extends MemBlackboxingPolicy
  144. object blackboxOnlyIfRequested extends MemBlackboxingPolicy
  145. object blackboxRequestedAndUninferable extends MemBlackboxingPolicy
  146. object cloneOf

    Return a new data with the same data structure than the given parameter (including bit width)

  147. object crossClockBuffer extends SpinalTag
  148. object crossClockDomain extends SpinalTag
  149. object default

    default statement of a switch case

    default statement of a switch case

    See also

    switch Documentation

  150. object distributedLut extends MemTechnologyKind
  151. object dontCare extends ReadUnderWritePolicy
  152. object ifGen
  153. object in extends IODirection

    Set a data to input

  154. object inWithNull extends IODirection

    Set a data to in if the data is not null

  155. object inferred extends SpinalEnumEncoding

    Inferred encoding

  156. object inout extends IODirection

    Set a data to inout

  157. object is

    is statement of a switch case

    is statement of a switch case

    See also

    switch Documentation

  158. object isPow2

    Check if a number is a power of 2

  159. object log2Up

    Give number of bit to encode a given number of states

  160. object native extends SpinalEnumEncoding

    Native encoding

  161. object noBackendCombMerge extends SpinalTag
  162. object noCombinatorialLoopCheck extends SpinalTag
  163. object noNumericType extends SpinalTag

    Transform all unsigned/signed into std_logic_vector

  164. object out extends IODirection

    Set a data to output

  165. object outWithNull extends IODirection

    Set a data to out if the data is not null

  166. object ramBlock extends MemTechnologyKind
  167. object randomBoot extends SpinalTag
  168. object readFirst extends ReadUnderWritePolicy
  169. object registerFile extends MemTechnologyKind
  170. object roundUp

    Round up a BigInt

  171. object signalCache
  172. object switch

    case/switch statement

    case/switch statement

    Example: 

    1. switch(x){
    is(value1){
        //execute when x === value1
    }
    is(value2){
        //execute when x === value2
    }
    default{
       //execute if none of precedent condition meet
    }
 }
    See also

    switch Documentation

  173. object tagAutoResize extends SpinalTag
  174. object tagTruncated extends SpinalTag
  175. object uLogic extends SpinalTag

    Create a Ulogic tag used by Blackbox in order to transform std_logic into std_ulogic

  176. object unsetRegIfNoAssignementTag extends SpinalTag
  177. object unusedTag extends SpinalTag
  178. object weakCloneOf

    Return a new data with the same data structure than the given parameter (execept bit width)

  179. object when

    If statement

    If statement

    Example: 

    1. when(cond1){
  myCnt := 0
}elsewhen(cond2){
  myCnt := myCnt + 1
}otherwise{
  myCnt := myCnt - 1
}
    See also

    when Documentation

  180. object widthOf

    Return the number of bit of the given data

  181. object writeFirst extends ReadUnderWritePolicy

Deprecated Value Members

  1. def toSFix(sint: SInt): SFix
    Definition Classes
    SFixCast
    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use xxx.toSFix instead

  2. def toUFix(uint: UInt): UFix
    Definition Classes
    UFixCast
    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use xxx.toUFix instead

  3. object Sel

    Sel operation

    Sel operation

    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use Select instead

  4. object cloneable
    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use HardType instead

  5. object wrap
    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use HardType instead

Inherited from BaseTypeCast

Inherited from UFixCast

Inherited from SFixCast

Inherited from BaseTypeFactory

Inherited from UFixFactory

Inherited from SFixFactory

Inherited from TypeFactory

Inherited from VecFactory

Inherited from SIntFactory

Inherited from UIntFactory

Inherited from BitsFactory

Inherited from BoolFactory

Inherited from AnyRef

Inherited from Any

Ungrouped