package core
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- BaseTypeCast
- UFixCast
- SFixCast
- BaseTypeFactory
- UFixFactory
- SFixFactory
- TypeFactory
- VecFactory
- SIntFactory
- UIntFactory
- BitsFactory
- BoolFactory
- AnyRef
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Type Members
-
trait
Area extends Nameable with ContextUser with OwnableRef with ScalaLocated
Sometime, creating a Component to define some logic is overkill.
Sometime, creating a Component to define some logic is overkill. For this kind of cases you can use Area to define a group of signals/logic.
val tickConter = new Area{ val tick = Reg(UInt(8 bits) init(0) tick := tick + 1 }
- See also
Example: - trait AssertNodeSeverity extends AnyRef
-
trait
Assignable extends AnyRef
Assignable trait
- trait Attribute extends SpinalTag
- class AttributeFlag extends Attribute
- sealed trait AttributeKind extends AnyRef
- class AttributeString extends Attribute
-
abstract
class
BaseType extends Data with DeclarationStatement with StatementDoubleLinkedContainer[BaseType, AssignmentStatement] with Expression
Abstract base class of all Spinal types
-
trait
BaseTypeCast extends SFixCast with UFixCast
Base type Cast
-
trait
BaseTypeFactory extends BoolFactory with BitsFactory with UIntFactory with SIntFactory with VecFactory with SFixFactory with UFixFactory
Base type factory
-
implicit
class
BigDecimalBuilder extends AnyRef
BigDecimal Builder
-
case class
BigIntBuilder(i: BigInt) extends Product with Serializable
BigInt Builder
-
case class
BitCount(value: Int) extends Product with Serializable
Represent the number of bit of a data
-
abstract
class
BitVector extends BaseType with Widthable
BitVector is a family of types for storing multiple bits of information in a single value.
BitVector is a family of types for storing multiple bits of information in a single value. This type has three subtypes that can be used to model different behaviours:
- Bits
- UInt (unsigned integer)
- SInt (signed integer)
- See also
-
abstract
class
BitVectorLiteralFactory[T <: BitVector] extends AnyRef
Base class to create Bit Vector from literal
-
class
Bits extends BitVector with DataPrimitives[Bits] with BitwiseOp[Bits]
The Bits type corresponds to a vector of bits that does not convey any arithmetic meaning.
The Bits type corresponds to a vector of bits that does not convey any arithmetic meaning.
val myBits1 = Bits(32 bits) val myBits2 = B(25, 8 bits) val myBits3 = B"8'xFF" val myBits4 = B"1001_0011
- See also
Example: -
trait
BitsFactory extends AnyRef
Bits factory used for instance by the IODirection to create a in/out Bits
-
trait
BitwiseOp[T <: Data] extends AnyRef
Bitwise Operation
Bitwise Operation
- T
the type which is associated with the bitwise operation
-
abstract
class
BlackBox extends Component
A blackbox allows the user to integrate an existing VHDL/Verilog component into the design by just specifying the interfaces.
A blackbox allows the user to integrate an existing VHDL/Verilog component into the design by just specifying the interfaces.
class Ram_1w_1r(wordWidth: Int, wordCount: Int) extends BlackBox { val generic = new Generic { val wordCount = Ram_1w_1r.this.wordCount val wordWidth = Ram_1w_1r.this.wordWidth } val io = new Bundle { val clk = in Bool val wr = new Bundle { val en = in Bool val addr = in UInt (log2Up(wordCount) bit) val data = in Bits (wordWidth bit) } val rd = new Bundle { val en = in Bool val addr = in UInt (log2Up(wordCount) bit) val data = out Bits (wordWidth bit) } } mapClockDomain(clock=io.clk) }
Example: -
abstract
class
BlackBoxULogic extends BlackBox
Create a blackBox with std_ulogic instead of std_logic
-
class
Bool extends BaseType with DataPrimitives[Bool] with BitwiseOp[Bool]
The Bool type corresponds to a boolean value (True or False)
The Bool type corresponds to a boolean value (True or False)
val myBool = Bool() myBool := False myBool := Bool(false)
- See also
Example: -
case class
BoolEdges() extends Bundle with Product with Serializable
Bundle for the edge detection
-
trait
BoolFactory extends AnyRef
Bool factory used for instance by the IODirection to create a in/out Bool
-
class
Bundle extends MultiData with Nameable
The Bundle is a composite type that defines a group of named signals (of any SpinalHDL basic type) under a single name.
The Bundle is a composite type that defines a group of named signals (of any SpinalHDL basic type) under a single name. The Bundle can be used to model data structures, buses and interfaces.
val cmd = new Bundle{ val init = in Bool val start = in Bool val result = out Bits(32 bits) }
- See also
Example: - class BundleCase extends Bundle
-
case class
ClockDomain(clock: Bool, reset: Bool = null, dummyArg: DummyTrait = null, softReset: Bool = null, clockEnable: Bool = null, config: ClockDomainConfig = GlobalData.get.commonClockConfig, frequency: ClockFrequency = UnknownFrequency(), clockEnableDivisionRate: DivisionRate = ClockDomain.UnknownDivisionRate()) extends Product with Serializable
clock and reset signals can be combined to create a clock domain.
clock and reset signals can be combined to create a clock domain. Clock domains could be applied to some area of the design and then all synchronous elements instantiated into this area will then implicitly use this clock domain. Clock domain application work like a stack, which mean, if you are in a given clock domain, you can still apply another clock domain locally
- See also
- sealed trait ClockDomainBoolTag extends SpinalTag
- case class ClockDomainConfig(clockEdge: EdgeKind = RISING, resetKind: ResetKind = ASYNC, resetActiveLevel: Polarity = HIGH, softResetActiveLevel: Polarity = HIGH, clockEnableActiveLevel: Polarity = HIGH) extends Product with Serializable
- case class ClockDomainTag(clockDomain: ClockDomain) extends SpinalTag with Product with Serializable
- case class ClockDrivedTag(driver: Bool) extends SpinalTag with Product with Serializable
- case class ClockDriverTag(drived: Bool) extends SpinalTag with Product with Serializable
-
class
ClockEnableArea extends Area with DelayedInit
Clock Area with a specila clock enable
- case class ClockEnableTag(clockDomain: ClockDomain) extends ClockDomainBoolTag with Product with Serializable
- case class ClockSyncTag(a: Bool, b: Bool) extends SpinalTag with Product with Serializable
- case class ClockTag(clockDomain: ClockDomain) extends ClockDomainBoolTag with Product with Serializable
-
class
ClockingArea extends Area with DelayedInit
Clock domains could be applied to some area of the design and then all synchronous elements instantiated into this area will then implicitly use this clock domain.
Clock domains could be applied to some area of the design and then all synchronous elements instantiated into this area will then implicitly use this clock domain.
- See also
-
abstract
class
Component extends NameableByComponent with ContextUser with ScalaLocated with DelayedInit with Stackable with OwnableRef with SpinalTagReady with OverridedEqualsHashCode
Abstract class used to create a new Component
Abstract class used to create a new Component
class MyAndGate extends Component { val io = new Bundle{ val a,b = in Bool val res = out Bool } io.res := io.a & io.b }
- See also
Example: - trait ConditionalContext extends GlobalDataUser
- trait ContextUser extends GlobalDataUser with ScalaLocated
-
case class
CyclesCount(value: BigInt) extends Product with Serializable
Cycles number representation
- trait Data extends ContextUser with NameableByComponent with Assignable with SpinalTagReady with GlobalDataUser with ScalaLocated with OwnableRef with OverridedEqualsHashCode
-
class
DataPimper[T <: Data] extends DataPrimitives[T]
Should not extends AnyVal, Because it create kind of strange call stack move that make error reporting miss accurate
- trait DataPrimitives[T <: Data] extends AnyRef
- trait DataWrapper extends Data
- class DefaultTag extends SpinalTag
-
case class
Device(vendor: String = "?", family: String = "?", name: String = "?") extends Product with Serializable
target device
- class DontName extends Annotation with Annotation with ClassfileAnnotation
-
case class
DoubleBuilder(d: Double) extends Product with Serializable
Double Builder
- trait DummyTrait extends AnyRef
- case class DumpWaveConfig(depth: Int = 0, vcdPath: String = "wave.vcd") extends Product with Serializable
- sealed trait EdgeKind extends AnyRef
- class ElseWhenClause extends AnyRef
-
implicit
class
ElseWhenClauseBuilder extends AnyRef
Implicit clause builder for
elseWhen
-
class
EnumLiteral[T <: SpinalEnum] extends Literal with InferableEnumEncodingImpl
Node representation which contains the value of an SpinalEnumElement
- class EnumPoison extends Literal with InferableEnumEncodingImpl
-
case class
ExpNumber(value: Int) extends Product with Serializable
Exponent representation
- class ExternalDriverTag extends SpinalTag
- type FixedFrequency = core.ClockDomain.FixedFrequency
- class GenerationFlags extends AnyRef
-
class
Generic extends AnyRef
Create a generic for a BlackBox
Create a generic for a BlackBox
class myMemory(sizeMem: Int) extends BlackBox{ val generic = new Generic{ val size = sizeMem } val io = new Bundle { ... } }
Example: -
class
GlobalData extends AnyRef
Global data
-
trait
GlobalDataUser extends AnyRef
Get a link to the globalData
- class HardType[T <: Data] extends AnyRef
-
case class
HertzNumber(v: BigDecimal) extends PhysicalNumber[HertzNumber] with Product with Serializable
Frequency representation
- type IClockDomainFrequency = ClockFrequency
-
trait
IODirection extends BaseTypeFactory
Trait used to set the direction of a data
- class IfDefTag extends SpinalTag
-
abstract
class
ImplicitArea[T] extends Area
Create an Area which can be assign to a data
Create an Area which can be assign to a data
class Counter extends ImplicitArea[UInt]{ val cnt = Reg(UInt(8 bits) ... override def implicitValue: UInt = cnt } val myCounter = Counter() io.myUInt = myCounter
Example: -
final
class
IntBuilder extends AnyVal
Integer Builder
- sealed trait Language extends AnyRef
-
implicit
class
LiteralBuilder extends AnyRef
Literal builder S/U/B"e.g. : B"8'xFF"
-
class
MaskedBoolean extends AnyRef
Masked Literal
Masked Literal
val itMatch = myBits === M"00--10--" // - don't care value
Example: - class MaskedLiteral extends AnyRef
- class Mem[T <: Data] extends DeclarationStatement with StatementDoubleLinkedContainer[Mem[_], MemPortStatement] with WidthProvider with SpinalTagReady
- trait MemBlackboxingPolicy extends AnyRef
- trait MemPortStatement extends LeafStatement with StatementDoubleLinkedContainerElement[Mem[_], MemPortStatement]
- class MemReadAsync extends MemPortStatement with WidthProvider with SpinalTagReady with ContextUser with Expression
- class MemReadSync extends MemPortStatement with WidthProvider with SpinalTagReady with ContextUser with Expression
- class MemReadWrite extends MemPortStatement with WidthProvider with SpinalTagReady with ContextUser with Expression
- trait MemTechnologyKind extends AnyRef
- class MemWrite extends MemPortStatement with WidthProvider with SpinalTagReady
- class MemWritePayload[T <: Data] extends Bundle
-
trait
MinMaxProvider extends AnyRef
Min max base function
-
abstract
class
MultiData extends Data
Base class for multi data like Vec, Bundle
- trait Nameable extends OwnableRef with ContextUser
- trait NameableByComponent extends Nameable with GlobalDataUser
- class NamingScope extends AnyRef
-
trait
Num[T <: Data] extends AnyRef
Base operations for numbers
Base operations for numbers
- T
the type which is associated with the base operation
- trait OverridedEqualsHashCode extends AnyRef
- trait OwnableRef extends AnyRef
-
abstract
class
PhysicalNumber[T <: PhysicalNumber[_]] extends AnyRef
Base class for the Physical representation (Hertz, Time, ...)
- sealed trait Polarity extends AnyRef
-
case class
PosCount(value: Int) extends Product with Serializable
Position representation
-
class
Ram_1w_1ra extends BlackBox
Ram 1w 1ra
-
class
Ram_1w_1rs extends BlackBox
Ram 1w 1rs
-
class
Ram_1wors extends BlackBox
Ram 1wors
-
class
Ram_1wrs extends BlackBox
Ram 1wrs
-
class
Ram_2c_1w_1rs extends BlackBox
Ram 2c 1w 1rs
-
class
Ram_2wrs extends BlackBox
Ram 2wrs
-
implicit
class
RangePimper extends AnyRef
Implicit Range helper
- trait ReadUnderWritePolicy extends AnyRef
-
case class
Ref[T](value: T) extends Product with Serializable
Use to give value by reference to a function
-
class
ResetArea extends Area with DelayedInit
ResetArea allow to reset an area with a special reset combining with the current reset (cumulative)
- sealed trait ResetKind extends AnyRef
- case class ResetTag(clockDomain: ClockDomain) extends ClockDomainBoolTag with Product with Serializable
- sealed trait RoundType extends AnyRef
-
class
SFix extends XFix[SFix, SInt]
Signed fix point
Signed fix point
- See also
- class SFix2D extends Bundle
- trait SFixCast extends AnyRef
- trait SFixFactory extends TypeFactory
-
class
SInt extends BitVector with Num[SInt] with MinMaxProvider with DataPrimitives[SInt] with BitwiseOp[SInt]
The SInt type corresponds to a vector of bits that can be used for signed integer arithmetic.
The SInt type corresponds to a vector of bits that can be used for signed integer arithmetic.
val mySInt = SInt(8 bits) mySInt := S(4, 8 bits) + S"0000_1111" mySInt := S(4) - S"h1A"
- See also
Example: -
trait
SIntFactory extends AnyRef
SInt factory used for instance by the IODirection to create a in/out SInt
-
implicit
class
SIntPimper extends AnyRef
Implicit SInt helper
-
class
SafeStack[T] extends AnyRef
Safe Stack
- class SafeStackWithStackable[T <: Stackable] extends SafeStack[T]
- trait ScalaLocated extends GlobalDataUser
-
case class
SlicesCount(value: Int) extends Product with Serializable
Slice size representation
-
class
SlowArea extends ClockingArea
Define a clock domain which is x time slower than the current clock
-
case class
SpinalConfig(mode: SpinalMode = null, flags: HashSet[Any] = mutable.HashSet[Any](), debugComponents: HashSet[Class[_]] = mutable.HashSet[Class[_]](), keepAll: Boolean = false, defaultConfigForClockDomains: ClockDomainConfig = ClockDomainConfig(), onlyStdLogicVectorAtTopLevelIo: Boolean = false, defaultClockDomainFrequency: IClockDomainFrequency = UnknownFrequency(), targetDirectory: String = ".", oneFilePerComponent: Boolean = false, netlistFileName: String = null, dumpWave: DumpWaveConfig = null, globalPrefix: String = "", privateNamespace: Boolean = false, formalAsserts: Boolean = false, anonymSignalPrefix: String = null, device: Device = Device(), inlineRom: Boolean = false, genVhdlPkg: Boolean = true, verbose: Boolean = false, mergeAsyncProcess: Boolean = false, asyncResetCombSensitivity: Boolean = false, anonymSignalUniqueness: Boolean = false, noRandBoot: Boolean = false, randBootFixValue: Boolean = true, noAssert: Boolean = false, phasesInserters: ArrayBuffer[(ArrayBuffer[Phase]) ⇒ Unit] = ..., transformationPhases: ArrayBuffer[Phase] = ArrayBuffer[Phase](), memBlackBoxers: ArrayBuffer[Phase] = ..., rtlHeader: String = null, _withEnumString: Boolean = true) extends Product with Serializable
Spinal configuration for the generation of the RTL
-
class
SpinalEnum extends Nameable with ScalaLocated
Base class for creating enumeration
Base class for creating enumeration
object MyEnum extends SpinalEnum(binarySequential){ val s1, s2, s3, s4 = newElement() }
SpinalEnum contains a list of SpinalEnumElement that is the definition of an element. SpinalEnumCraft is the hardware representation of the the element.
- See also
Example: -
class
SpinalEnumCraft[T <: SpinalEnum] extends BaseType with InferableEnumEncodingImpl with DataPrimitives[SpinalEnumCraft[T]]
Hardware representation of an enumeration
-
class
SpinalEnumElement[T <: SpinalEnum] extends Nameable
Definition of an element of the enumeration
-
trait
SpinalEnumEncoding extends Nameable with ScalaLocated
Trait to define an encoding
- class SpinalExit extends Exception
- trait SpinalMode extends AnyRef
-
class
SpinalReport[T <: Component] extends AnyRef
Spinal report give after the generation of the RTL
- trait SpinalTag extends AnyRef
- trait SpinalTagReady extends AnyRef
- trait Stackable extends AnyRef
- class SwitchContext extends AnyRef
-
case class
TimeNumber(v: BigDecimal) extends PhysicalNumber[TimeNumber] with Product with Serializable
Time representation
- trait TypeFactory extends AnyRef
-
class
UFix extends XFix[UFix, UInt]
Unsigned fix point
Unsigned fix point
- See also
-
class
UFix2D extends Bundle
Two-dimensional XFix
- trait UFixCast extends AnyRef
- trait UFixFactory extends TypeFactory
-
class
UInt extends BitVector with Num[UInt] with MinMaxProvider with DataPrimitives[UInt] with BitwiseOp[UInt]
The UInt type corresponds to a vector of bits that can be used for unsigned integer arithmetic.
The UInt type corresponds to a vector of bits that can be used for unsigned integer arithmetic.
val myUInt = UInt(8 bits) myUInt := U(2,8 bits) myUInt := U(2) myUInt := U"0000_0101" myUInt := U"h1A"
- See also
Example: -
case class
UInt2D(xBitCount: BitCount, yBitCount: BitCount) extends Bundle with Product with Serializable
Define an UInt 2D point
Define an UInt 2D point
- xBitCount
width of the x point
- yBitCount
width of the y point
val positionOnScreen = Reg(UInt2D(log2Up(p.screenResX) bits, log2Up(p.screenResY) bits))
Example: -
trait
UIntFactory extends AnyRef
UInt factory used for instance by the IODirection to create a in/out UInt
-
implicit
class
UIntPimper extends AnyRef
Implicit UInt helper
- type UnknownFrequency = core.ClockDomain.UnknownFrequency
- class VarAssignementTag extends SpinalTag
-
class
Vec[T <: Data] extends MultiData with IndexedSeq[T]
The Vec is a composite type that defines a group of indexed signals (of any SpinalHDL basic type) under a single name
The Vec is a composite type that defines a group of indexed signals (of any SpinalHDL basic type) under a single name
val myVecOfSInt = Vec(SInt(8 bits), 2)
- See also
Example: - class VecAccessAssign[T <: Data] extends Assignable
-
trait
VecFactory extends AnyRef
Vec factory
-
class
VecBuilder extends AnyRef
- Definition Classes
- VecFactory
-
class
WhenContext extends ConditionalContext with ScalaLocated
else / else if statement
else / else if statement
- See also
-
abstract
class
XFix[T <: XFix[T, R], R <: BitVector with Num[R]] extends MultiData
Base class for SFix and UFix
- type dontName = spinal.core.DontName @scala.annotation.meta.field
Value Members
- implicit def BigIntToBits(that: BigInt): Bits
- implicit def BigIntToBuilder(value: BigInt): BigIntBuilder
- implicit def BigIntToSInt(that: BigInt): SInt
- implicit def BigIntToUInt(that: BigInt): UInt
-
def
Bits(width: BitCount): Bits
Create a new Bits of a given width
Create a new Bits of a given width
- Definition Classes
- BitsFactory
-
def
Bits(): Bits
Create a new Bits
Create a new Bits
- Definition Classes
- BitsFactory
-
def
Bool(value: Boolean): Bool
Create a new Bool initialized with a boolean value
Create a new Bool initialized with a boolean value
- Definition Classes
- BoolFactory
-
def
Bool(): Bool
Create a new Bool
Create a new Bool
- Definition Classes
- BoolFactory
- implicit def BooleanPimped[T <: Data](that: Boolean): BooleanPimped
-
implicit
def
DataPimped[T <: Data](that: T): DataPimper[T]
Implicit Data helper
- implicit def DoubleToBuilder(value: Double): DoubleBuilder
- implicit def EnumCtoEnumC2[T <: SpinalEnum, T2 <: T](craft: SpinalEnumCraft[T2]): SpinalEnumCraft[T]
- implicit def EnumCtoEnumC3[T <: SpinalEnum, T2 <: T](craft: SpinalEnumCraft[T]): SpinalEnumCraft[T2]
- implicit def EnumElementToCraft[T <: SpinalEnum](element: SpinalEnumElement[T]): SpinalEnumCraft[T]
-
implicit
def
EnumEtoEnumE2[T <: SpinalEnum, T2 <: T](element: SpinalEnumElement[T2]): SpinalEnumElement[T]
Implicit enum conversion
- implicit def EnumEtoEnumE3[T <: SpinalEnum, T2 <: T](element: SpinalEnumElement[T]): SpinalEnumElement[T2]
- def False: Bool
- def FixedFrequency(value: HertzNumber): core.ClockDomain.FixedFrequency
- implicit def IntToBits(that: Int): Bits
-
implicit
def
IntToBuilder(value: Int): IntBuilder
Implicit Int/BigInt/Double to Builder
- implicit def IntToSInt(that: Int): SInt
-
implicit
def
IntToUInt(that: Int): UInt
Implicit conversion from Int/BigInt/String to UInt/SInt/Bits
-
def
SFix(peak: ExpNumber, resolution: ExpNumber): SFix
- Definition Classes
- SFixFactory
-
def
SFix(peak: ExpNumber, width: BitCount): SFix
- Definition Classes
- SFixFactory
-
def
SInt(width: BitCount): SInt
Create a new SInt of a given width
Create a new SInt of a given width
- Definition Classes
- SIntFactory
-
def
SInt(): SInt
Create a new SInt
Create a new SInt
- Definition Classes
- SIntFactory
- implicit def StringToBits(that: String): Bits
- implicit def StringToSInt(that: String): SInt
- implicit def StringToUInt(that: String): UInt
-
def
True: Bool
True / False definition
-
def
UFix(peak: ExpNumber, resolution: ExpNumber): UFix
- Definition Classes
- UFixFactory
-
def
UFix(peak: ExpNumber, width: BitCount): UFix
- Definition Classes
- UFixFactory
-
def
UInt(width: BitCount): UInt
Create a new UInt of a given width
Create a new UInt of a given width
- Definition Classes
- UIntFactory
-
def
UInt(): UInt
Create a new UInt
Create a new UInt
- Definition Classes
- UIntFactory
- def UnknownFrequency(): core.ClockDomain.UnknownFrequency
-
def
Vec[T <: Data](firstElement: T, followingElements: T*): Vec[T]
- Definition Classes
- VecFactory
-
def
Vec[T <: Data](gen: ⇒ T, size: Int): Vec[T]
- Definition Classes
- VecFactory
-
def
Vec[T <: Data](elements: TraversableOnce[T], dataType: HardType[T] = null): Vec[T]
- Definition Classes
- VecFactory
-
val
Vec: VecBuilder
- Definition Classes
- VecFactory
- def assert(assertion: Bool, message: Seq[Any], severity: AssertNodeSeverity): AssertStatement
- def assert(assertion: Bool, message: String, severity: AssertNodeSeverity): AssertStatement
- def assert(assertion: Bool, message: Seq[Any]): AssertStatement
- def assert(assertion: Bool, message: String): AssertStatement
- def assert(assertion: Bool, severity: AssertNodeSeverity): AssertStatement
- def assert(assertion: Bool): AssertStatement
-
final
def
assert(assertion: Boolean, message: ⇒ Any): Unit
- Annotations
- @elidable( ASSERTION ) @inline()
-
def
assert(assertion: Boolean): Unit
Assertion
Assertion
- Annotations
- @elidable( ASSERTION )
- def assume(assertion: Bool): AssertStatement
- def cover(assertion: Bool): AssertStatement
-
implicit
lazy val
implicitConversions: implicitConversions
Scala implicit
-
def
postTypeFactory[T <: Data](that: T): T
- Definition Classes
- TypeFactory
- implicit lazy val postfixOps: postfixOps
- implicit lazy val reflectiveCalls: reflectiveCalls
- def report(message: Seq[Any], severity: AssertNodeSeverity): AssertStatement
- def report(message: String, severity: AssertNodeSeverity): AssertStatement
- def report(message: Seq[Any]): AssertStatement
- def report(message: String): AssertStatement
- object ASYNC extends ResetKind
- object AllowMixedWidth extends SpinalTag
-
object
Analog
Set a data to Analog
- object AnnotationUtils
- object ArrayManager
-
object
B extends BitVectorLiteralFactory[Bits]
Used to create a new Bits or cast to Bits
- object BOOT extends ResetKind
- object BaseType
- object COMMENT_ATTRIBUTE extends AttributeKind
-
object
Cat
Concatenate a list of data
- object Clock
- object ClockDomain extends Serializable
-
object
CombInit
Declare a register with an initialize value
- object Component
- object ConditionalContext
- object CyclesCount extends Serializable
- object DEFAULT_ATTRIBUTE extends AttributeKind
- object Data
- object DataAssign
- object Device extends Serializable
- object Driver
- object ERROR extends AssertNodeSeverity
- object FAILURE extends AssertNodeSeverity
- object FALLING extends EdgeKind
- object Formal
- object GenerationFlags
- object GlobalData
- object HIGH extends Polarity
- object HardType
- object ImplicitArea
- object Info
- object InitAssign
- object LOW extends Polarity
- object Language
- object LocatedPendingError
- object MaskedLiteral
- object Mem
- object MemReadAsync
- object MemReadSync
- object MemReadWrite
- object MemWrite
-
object
Mux
Mux operation
- object NOTE extends AssertNodeSeverity
- object Nameable
- object OwnableRef
- object PendingError
- object RISING extends EdgeKind
-
object
Reg
Create a register
-
object
RegInit
Declare a register with an initialize value
-
object
RegNext
Register a signal of one clock
-
object
RegNextWhen
Register a signal when a condition is true
- object RoundType
-
object
S extends BitVectorLiteralFactory[SInt]
Used to create a new SInt or cast to SInt
- object SF
-
object
SFix2D
Two-dimensionnal SFix
- object SYNC extends ResetKind
- object ScalaLocated
- object Select
- object Spinal
- object SpinalConfig extends Serializable
-
object
SpinalEnumEncoding
Used to create a custom encoding
Used to create a custom encoding
object BR extends SpinalEnum{ val NE, EQ, J, JR = newElement() defaultEncoding = SpinalEnumEncoding("opt")( EQ -> 0, NE -> 1, J -> 2, JR -> 3 ) }
Example: - object SpinalError
- object SpinalExit extends Serializable
- object SpinalInfo
- object SpinalLog
-
object
SpinalMap
Spinal map
- object SpinalProgress
- object SpinalSystemVerilog
- object SpinalTagReady
- object SpinalVerilog
- object SpinalVhdl
- object SpinalWarning
- object SystemVerilog extends SpinalMode
-
object
U extends BitVectorLiteralFactory[UInt]
Used to create a new UInt or cast to UInt
- object UF
-
object
UFix2D
Two-dimensionnal UFix
- object UInt2D extends Serializable
- object VHDL extends SpinalMode
- object Verilator
- object Verilog extends SpinalMode
- object WARNING extends AssertNodeSeverity
-
object
addDefaultGenericValue extends SpinalTag
In VHDL add the generic value in the definition of the blackbox
- object allowAssignmentOverride extends SpinalTag
- object allowDirectionLessIoTag extends SpinalTag
- object auto extends MemTechnologyKind
-
object
binaryOneHot extends SpinalEnumEncoding
Binary One hot encoding
Binary One hot encoding
001, 010, 100
Example: -
object
binarySequential extends SpinalEnumEncoding
Binary Sequential
Binary Sequential
000, 001, 010, 011, 100, 101, ....
Example: - object blackboxAll extends MemBlackboxingPolicy
- object blackboxAllWhatsYouCan extends MemBlackboxingPolicy
- object blackboxOnlyIfRequested extends MemBlackboxingPolicy
- object blackboxRequestedAndUninferable extends MemBlackboxingPolicy
-
object
cloneOf
Return a new data with the same data structure than the given parameter (including bit width)
- object crossClockBuffer extends SpinalTag
- object crossClockDomain extends SpinalTag
-
object
default
default statement of a switch case
default statement of a switch case
- See also
- object distributedLut extends MemTechnologyKind
- object dontCare extends ReadUnderWritePolicy
- object ifGen
-
object
in extends IODirection
Set a data to input
-
object
inWithNull extends IODirection
Set a data to in if the data is not null
-
object
inferred extends SpinalEnumEncoding
Inferred encoding
-
object
inout extends IODirection
Set a data to inout
-
object
is
is statement of a switch case
is statement of a switch case
- See also
-
object
isPow2
Check if a number is a power of 2
-
object
log2Up
Give number of bit to encode a given number of states
-
object
native extends SpinalEnumEncoding
Native encoding
- object noBackendCombMerge extends SpinalTag
- object noCombinatorialLoopCheck extends SpinalTag
-
object
noNumericType extends SpinalTag
Transform all unsigned/signed into std_logic_vector
-
object
out extends IODirection
Set a data to output
-
object
outWithNull extends IODirection
Set a data to out if the data is not null
- object ramBlock extends MemTechnologyKind
- object randomBoot extends SpinalTag
- object readFirst extends ReadUnderWritePolicy
- object registerFile extends MemTechnologyKind
-
object
roundUp
Round up a BigInt
- object signalCache
-
object
switch
case/switch statement
case/switch statement
switch(x){ is(value1){ //execute when x === value1 } is(value2){ //execute when x === value2 } default{ //execute if none of precedent condition meet } }
- See also
Example: - object tagAutoResize extends SpinalTag
- object tagTruncated extends SpinalTag
-
object
uLogic extends SpinalTag
Create a Ulogic tag used by Blackbox in order to transform std_logic into std_ulogic
- object unsetRegIfNoAssignementTag extends SpinalTag
- object unusedTag extends SpinalTag
-
object
weakCloneOf
Return a new data with the same data structure than the given parameter (execept bit width)
-
object
when
If statement
If statement
when(cond1){ myCnt := 0 }elsewhen(cond2){ myCnt := myCnt + 1 }otherwise{ myCnt := myCnt - 1 }
- See also
Example: -
object
widthOf
Return the number of bit of the given data
- object writeFirst extends ReadUnderWritePolicy
Deprecated Value Members
-
def
toSFix(sint: SInt): SFix
- Definition Classes
- SFixCast
- Annotations
- @deprecated
- Deprecated
(Since version ???) Use xxx.toSFix instead
-
def
toUFix(uint: UInt): UFix
- Definition Classes
- UFixCast
- Annotations
- @deprecated
- Deprecated
(Since version ???) Use xxx.toUFix instead
-
object
Sel
Sel operation
Sel operation
- Annotations
- @deprecated
- Deprecated
(Since version ???) Use Select instead
-
object
cloneable
- Annotations
- @deprecated
- Deprecated
(Since version ???) Use HardType instead
-
object
wrap
- Annotations
- @deprecated
- Deprecated
(Since version ???) Use HardType instead