package sim

Simulation package

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Type Members

  1. implicit class SimArrayBufferPimper[T] extends AnyRef
  2. implicit class SimBaseTypePimper extends AnyRef

    Add implicit function to BaseType for simulation

  3. implicit class SimBitVectorPimper extends AnyRef

    Add implicit function to BitVector

  4. implicit class SimBitsPimper extends AnyRef

    Add implicit function to Bits

  5. implicit class SimBoolPimper extends AnyRef

    Add implicit function to Bool

  6. implicit class SimClockDomainPimper extends AnyRef

    Add implicit function to ClockDomain

  7. abstract class SimCompiled[T <: Component] extends AnyRef

    Run simulation

  8. case class SimConfigLegacy[T <: Component](_rtlGen: Option[() ⇒ T] = None, _spinalConfig: SpinalConfig = SpinalConfig(), _spinalReport: Option[SpinalReport[T]] = None) extends Product with Serializable

    Legacy simulation configuration

  9. implicit class SimDataPimper[T <: Data] extends AnyRef

    Add implicit function to Data

  10. implicit class SimEnumPimper[T <: SpinalEnum] extends AnyRef

    Add implicit function to Enum

  11. implicit class SimMemPimper[T <: Data] extends AnyRef
  12. case class SimMutex() extends Product with Serializable
  13. implicit class SimSIntPimper extends AnyRef

    Add implicit function to SInt

  14. implicit class SimSeqPimper[T] extends AnyRef
  15. implicit class SimUIntPimper extends AnyRef

    Add implicit function to UInt

  16. implicit class SimpComponentPimper[T <: Component] extends AnyRef
  17. case class SpinalGhdlBackendConfig[T <: Component](rtl: SpinalReport[T], waveFormat: WaveFormat = WaveFormat.NONE, workspacePath: String = "./", workspaceName: String = null, wavePath: String = null, wavePrefix: String = null, waveDepth: Int = 0, optimisationLevel: Int = 2, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), usePluginsCache: Boolean = true, pluginsCachePath: String = "./simWorkspace/.pluginsCachePath") extends SpinalVpiBackendConfig[T] with Product with Serializable
  18. case class SpinalIVerilogBackendConfig[T <: Component](rtl: SpinalReport[T], waveFormat: WaveFormat = WaveFormat.NONE, workspacePath: String = "./", workspaceName: String = null, wavePath: String = null, wavePrefix: String = null, waveDepth: Int = 0, optimisationLevel: Int = 2, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), usePluginsCache: Boolean = true, pluginsCachePath: String = "./simWorkspace/.pluginsCachePath") extends SpinalVpiBackendConfig[T] with Product with Serializable
  19. class SpinalSimBackendSel extends AnyRef
  20. case class SpinalSimConfig(_workspacePath: String = ..., _workspaceName: String = null, _waveDepth: Int = 0, _spinalConfig: SpinalConfig = SpinalConfig(), _optimisationLevel: Int = 0, _simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), _additionalRtlPath: ArrayBuffer[String] = ArrayBuffer[String](), _additionalIncludeDir: ArrayBuffer[String] = ArrayBuffer[String](), _waveFormat: WaveFormat = WaveFormat.NONE, _backend: SpinalSimBackendSel = SpinalSimBackendSel.VERILATOR, _withCoverage: Boolean = false) extends Product with Serializable

    SpinalSim configuration

  21. case class SpinalVerilatorBackendConfig[T <: Component](rtl: SpinalReport[T], waveFormat: WaveFormat = WaveFormat.NONE, workspacePath: String = "./", workspaceName: String = null, vcdPath: String = null, vcdPrefix: String = null, waveDepth: Int = 0, optimisationLevel: Int = 2, simulatorFlags: ArrayBuffer[String] = ArrayBuffer[String](), withCoverage: Boolean) extends Product with Serializable
  22. class SpinalVpiBackendConfig[T <: Component] extends AnyRef
  23. class SwapTagPhase extends PhaseNetlist

    Swap all oldTag with newTag

Value Members

  1. def SimConfig: SpinalSimConfig
  2. def delayed(delay: Long)(body: ⇒ Unit): Unit
  3. def disableSimWave(): Unit
  4. def enableSimWave(): Unit
  5. def fork(body: ⇒ Unit): SimThread

    Fork

  6. def forkJoin(bodys: () ⇒ Unit*): Unit
  7. def forkSensitive(trigger: ⇒ Any)(block: ⇒ Unit): Unit
  8. def forkSensitive(triggers: Data*)(block: ⇒ Unit): Unit
  9. def forkSensitive(block: ⇒ Unit): Unit
  10. def forkSensitiveWhile(block: ⇒ Boolean): Unit
  11. def getBigInt[T <: Data](mem: Mem[T], address: Long): BigInt
  12. def onSimEnd(body: ⇒ Unit): Unit
  13. def periodicaly(delay: Long)(body: ⇒ Unit): Unit
  14. def setBigInt(bt: BaseType, value: BigInt): Unit

    Set a BigInt value to a BaseType

  15. def setBigInt[T <: Data](mem: Mem[T], address: Long, data: BigInt): Unit
  16. def setLong(bt: BaseType, value: Long): Unit

    Set a long value to a BaseType

  17. def simDeltaCycle(): Long
  18. def simFailure(message: String = ""): Nothing
  19. def simSuccess(): Nothing

    Success/Failure simulation

  20. def simThread: SimThread
  21. def simTime(): Long

    Return the current simulation time

  22. def sleep(cycles: Double): Unit
  23. def sleep(cycles: Long): Unit

    Sleep / WaitUntil

  24. def waitUntil(cond: ⇒ Boolean): Unit
  25. object DoClock

    Generate a clock

  26. object DoReset

    Execute a reset sequence

  27. object ForkClock

    Fork the DoClock

  28. object SimPublic extends SpinalTag

    Tag SimPublic

  29. object SimSpeedPrinter

    Print the simulation speed

  30. object SimStatics
  31. object SimTimeout

    Create a Timeout for the simulation

  32. object SimWorkspace

    Simulation Workspace

  33. object SpinalGhdlBackend
  34. object SpinalIVerilogBackend
  35. object SpinalSimBackendSel
  36. object SpinalVerilatorBackend
  37. object SpinalVerilatorSim
  38. object SpinalVpiBackend
  39. object TracingOff extends SpinalTag

Deprecated Value Members

  1. def SimConfig[T <: Component](rtl: SpinalReport[T]): SimConfigLegacy[T]
    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use SimConfig.???.compile(new Dut) instead

  2. def SimConfig[T <: Component](rtl: ⇒ T): SimConfigLegacy[T]
    Annotations
    @deprecated
    Deprecated

    (Since version ???) Use SimConfig.???.compile(new Dut) instead

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