abstract class BitVector extends BaseType with Widthable
BitVector is a family of types for storing multiple bits of information in a single value.
This type has three subtypes that can be used to model different behaviors:
BitsUInt(unsigned integer)SInt(signed integer)
- See also
- Alphabetic
- By Inheritance
- BitVector
- Widthable
- WidthProvider
- BaseType
- Expression
- StatementDoubleLinkedContainer
- DoubleLinkedContainer
- DeclarationStatement
- LeafStatement
- Statement
- BaseNode
- ExpressionContainer
- Data
- InComponent
- OverridedEqualsHashCode
- SpinalTagReady
- Assignable
- NameableByComponent
- Nameable
- OwnableRef
- ContextUser
- ScalaLocated
- GlobalDataUser
- AnyRef
- Any
- Hide All
- Show All
- Public
- Protected
Instance Constructors
- new BitVector()
Type Members
- abstract type RefOwnerType
- Definition Classes
- OwnableRef
- abstract type T <: BitVector
Used to know the data type of the children class of BitVector
Abstract Value Members
- abstract def apply(offset: UInt, bitCount: BitCount): BitVector.this.type
Return a range of bits at offset and of width bitCount
Return a range of bits at offset and of width bitCount
val myBool = myBits(myUInt, 2 bits)
Example: - abstract def apply(offset: Int, bitCount: BitCount): BitVector.this.type
Return a range of bits at offset and of width bitCount
Return a range of bits at offset and of width bitCount
val myBool = myBits(3, 2 bits)
Example: - abstract def apply(bitId: UInt): Bool
Return the bit at index bitId
Return the bit at index bitId
val myBool = myBits(myUInt)
Example: - abstract def apply(bitId: Int): Bool
Return the bit at index bitId
Return the bit at index bitId
val myBool = myBits(3)
Example: - abstract def asBits: Bits
Cast signal to Bits
Cast signal to Bits
- Definition Classes
- Data
- abstract def assignFromBits(bits: Bits, hi: Int, low: Int): Unit
- Definition Classes
- Data
- abstract def assignFromBits(bits: Bits): Unit
- Definition Classes
- Data
- abstract def getAllTrue: BitVector.this.type
- abstract def getTypeObject: Any
- Definition Classes
- Expression
- abstract def getZero: BitVector.this.type
Create a signal set to 0
Create a signal set to 0
- Definition Classes
- Data
- abstract def getZeroUnconstrained: BitVector.this.type
- abstract def opName: String
- Definition Classes
- Expression
- abstract def resize(width: BitCount): BitVector
- abstract def resize(width: Int): BitVector
Resize the bitVector to width
Resize the bitVector to width
- returns
a resized bitVector
val res = myBits.resize(10)
Example: - abstract def reversed: BitVector.this.type
- abstract def rotateLeft(that: Int): T
Left rotation of that bits
- abstract def rotateRight(that: Int): T
Right rotation of that bits
Concrete Value Members
- final def !=(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- def ##(right: Data): Bits
Concatenation between two signals
Concatenation between two signals
- Definition Classes
- Data
- final def ##: Int
- Definition Classes
- AnyRef → Any
- def #*(count: Int): Bits
Return the
counttime concatenation of the signal.Return the
counttime concatenation of the signal.- Definition Classes
- Data
- def =/=(that: MaskedLiteral): Bool
BitVector is not equal to MaskedLiteral
- final def ==(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- def ===(that: MaskedLiteral): Bool
Compare a BitVector with a MaskedLiteral (M"110--0")
Compare a BitVector with a MaskedLiteral (M"110--0")
- that
the maskedLiteral
- returns
a Bool data containing the result of the comparison
val myBool = myBits === M"0-1"
Example: - def IFparent: Data
- Definition Classes
- Data
- val _spinalTags: LinkedHashSet[SpinalTag]
- Definition Classes
- SpinalTagReady
- def addAttribute(attribute: Attribute): BitVector.this.type
- Definition Classes
- BaseType → Data → SpinalTagReady
- def addAttribute(name: String, value: Int): BitVector.this.type
- Definition Classes
- SpinalTagReady
- def addAttribute(name: String, value: String): BitVector.this.type
- Definition Classes
- SpinalTagReady
- def addAttribute(name: String): BitVector.this.type
- Definition Classes
- SpinalTagReady
- def addTag[T <: SpinalTag](spinalTag: T): BitVector.this.type
- Definition Classes
- SpinalTagReady
- def addTags(h: SpinalTag, tail: SpinalTag*): BitVector.this.type
- Definition Classes
- SpinalTagReady
- def addTags[T <: SpinalTag](tags: Iterable[T]): BitVector.this.type
- Definition Classes
- SpinalTagReady
- val algoIncrementale: Int
- Definition Classes
- BaseNode
- val algoInt: Int
- Definition Classes
- BaseNode
- def allowDirectionLessIo(): BitVector.this.type
Allow a signal of an io
Bundleto be directionless.Allow a signal of an io
Bundleto be directionless.- Definition Classes
- Data
- See also
- def allowOverride(): BitVector.this.type
Allow a signal to be overridden.
Allow a signal to be overridden.
- Definition Classes
- Data
- See also
- def allowPartialyAssigned(): BitVector.this.type
Allow a register to be partially assigned
Allow a register to be partially assigned
- Definition Classes
- Data
- def allowPruning(): BitVector.this.type
- Definition Classes
- Data
- def allowSimplifyIt(): BitVector.this.type
- def allowUnsetRegToAvoidLatch(): BitVector.this.type
Allow a register to have only an init (no assignments)
Allow a register to have only an init (no assignments)
- Definition Classes
- Data
- See also
- def andMask(that: Bool): BitVector.this.type
- def andR: Bool
Hardware logical AND of all bits
Hardware logical AND of all bits
Equivalent to
this.asBits === ((BigInt(1) << getWidth) - 1). - def apply(range: Range): BitVector.this.type
Return a range of bits
Return a range of bits
val myBool = myBits(3 downto 1)
Example: - def as[T <: Data](dataType: HardType[T]): T
- Definition Classes
- Data
- def asBool: Bool
Return
this.lsb - def asBools: Vec[Bool]
Cast the
BitVectorinto a vector ofBool - def asData: Data
- Definition Classes
- Data
- def asInOut(): BitVector.this.type
Set a signal as
inout - def asInput(): BitVector.this.type
Set a data as input
- final def asInstanceOf[T0]: T0
- Definition Classes
- Any
- def asOutput(): BitVector.this.type
Set a data as output
- def assignDontCare(): BitVector.this.type
Assign the default 'x' value to all signals composing this type.
Assign the default 'x' value to all signals composing this type.
- Definition Classes
- Data
- See also
- def assignDontCareToUnasigned(): BitVector.this.type
- Definition Classes
- Data
- def assignFormalRandom(kind: RandomExpKind): Unit
- Definition Classes
- Data
- final def assignFrom(that: AnyRef, target: AnyRef = this)(implicit loc: Location): Unit
- Definition Classes
- Data
- def assignFromBits(bits: Bits, offset: Int, bitCount: BitCount): Unit
- Definition Classes
- Data
- def assignFromImpl(that: AnyRef, target: AnyRef, kind: AnyRef)(implicit loc: Location): Unit
- Attributes
- protected
- Definition Classes
- BaseType → Assignable
- def bitsRange: Range
- def cldCount: Int
- Definition Classes
- DoubleLinkedContainer
- def clearAll(): BitVector.this.type
Clear all bits
- var clockDomain: ClockDomain
- Definition Classes
- BaseType
- def clone(): BitVector.this.type
- def component: Component
- Definition Classes
- ContextUser
- final def compositAssignFrom(that: AnyRef, target: AnyRef, kind: AnyRef)(implicit loc: Location): Unit
- Definition Classes
- Assignable
- val compositeAssign: Assignable
- Definition Classes
- Assignable
- def copyDirectionOfImpl(that: Data): BitVector.this.type
- def dirString(): String
- Definition Classes
- Data
- def dlcAppend(that: AssignmentStatement): BitVector.this.type
- Definition Classes
- DoubleLinkedContainer
- def dlcForeach[T >: AssignmentStatement](func: (T) => Unit): Unit
- Definition Classes
- DoubleLinkedContainer
- def dlcHasOnlyOne: Boolean
- Definition Classes
- DoubleLinkedContainer
- val dlcHead: AssignmentStatement
- Definition Classes
- DoubleLinkedContainer
- def dlcIsEmpty: Boolean
- Definition Classes
- DoubleLinkedContainer
- val dlcLast: AssignmentStatement
- Definition Classes
- DoubleLinkedContainer
- def dlcPrepend(that: AssignmentStatement): BitVector.this.type
- Definition Classes
- DoubleLinkedContainer
- def dontSimplifyIt(): BitVector.this.type
- def drop(n: Int): Bits
Drop lowest n bits
Drop lowest n bits
- returns
data10bits(9 downto 4)
val res = data10bits.drop(4)
Example: - def dropHigh(n: Int): Bits
Drop highest n bits
Drop highest n bits
- returns
data10bits(5 downto 0)
val res = data10bits.dropHigh(4)
Example: - def dropLow(n: Int): Bits
- final def eq(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- def equals(obj: Any): Boolean
- Definition Classes
- OverridedEqualsHashCode → AnyRef → Any
- def existsTag(cond: (SpinalTag) => Boolean): Boolean
- Definition Classes
- SpinalTagReady
- def filterTag(cond: (SpinalTag) => Boolean): Iterable[SpinalTag]
- Definition Classes
- SpinalTagReady
- def findTag(cond: (SpinalTag) => Boolean): Option[SpinalTag]
- Definition Classes
- SpinalTagReady
- def flatten: Seq[BaseType]
- def flattenForeach(body: (BaseType) => Unit): Unit
- def flattenLocalName: Seq[String]
- def flip(): BitVector.this.type
Flip the direction of the signal.
Flip the direction of the signal.
inandoutare swapped,inoutstay the same.- Definition Classes
- Data
- def foreachClockDomain(func: (ClockDomain) => Unit): Unit
- def foreachDrivingExpression(func: (Expression) => Unit): Unit
- Definition Classes
- ExpressionContainer
- def foreachExpression(func: (Expression) => Unit): Unit
- Definition Classes
- DeclarationStatement → ExpressionContainer
- def foreachReflectableNameables(doThat: (Any) => Unit): Unit
- Definition Classes
- Nameable
- def foreachStatements(func: (AssignmentStatement) => Unit): Unit
- Definition Classes
- StatementDoubleLinkedContainer
- def foreachTag(body: (SpinalTag) => Unit): Unit
- Definition Classes
- SpinalTagReady
- def freeze(): BitVector.this.type
- def getAheadValue(): BitVector.this.type
For a register, get the value it will have at the next clock, as a combinational signal.
- def getBitsWidth: Int
Return the width of the data
- final def getClass(): Class[_ <: AnyRef]
- Definition Classes
- AnyRef → Any
- Annotations
- @HotSpotIntrinsicCandidate() @native()
- def getComponent(): Component
- Definition Classes
- Data → InComponent → NameableByComponent
- def getComponents(): Seq[Component]
Get current component with all parents
Get current component with all parents
- Definition Classes
- InComponent
- def getDirection: IODirection
- Definition Classes
- Data
- def getDisplayName(): String
- Definition Classes
- Nameable
- def getDrivingReg(reportError: Boolean = true): BitVector.this.type
- Definition Classes
- BaseType
- def getInstanceCounter: Int
- Definition Classes
- ContextUser
- def getMode: Byte
- Attributes
- protected
- Definition Classes
- Nameable
- def getMuxType[T <: Data](list: TraversableOnce[T]): HardType[T]
- def getName(default: String): String
- Definition Classes
- NameableByComponent → Nameable
- def getName(): String
- Definition Classes
- NameableByComponent → Nameable
- def getPartialName(): String
- Definition Classes
- Nameable
- def getPath(from: Component, to: Component): Seq[Component]
- Definition Classes
- NameableByComponent
- def getRealSource: Any
- Definition Classes
- Assignable
- def getRealSourceNoRec: Any
- Definition Classes
- Data → Assignable
- def getRefOwnersChain(): List[Any]
- Definition Classes
- OwnableRef
- def getRootParent: Data
- Definition Classes
- Data
- def getRtlPath(separator: String = "/"): String
- Definition Classes
- Data
- def getScalaLocationLong: String
- Definition Classes
- ScalaLocated
- def getScalaLocationShort: String
- Definition Classes
- ScalaLocated
- def getScalaTrace(): Throwable
- Definition Classes
- ScalaLocated
- def getSingleDriver: Option[BitVector.this.type]
- Definition Classes
- BaseType
- def getTag[T <: SpinalTag](clazz: Class[T]): Option[T]
- Definition Classes
- SpinalTagReady
- def getTags(): LinkedHashSet[SpinalTag]
- Definition Classes
- SpinalTagReady
- def getTagsOf[T <: SpinalTag]()(implicit tag: ClassTag[T]): Iterable[T]
- Definition Classes
- SpinalTagReady
- def getWidth: Int
- Definition Classes
- Widthable → WidthProvider
- def getWidthNoInferation: Int
Return the width
- def getWidthStringNoInferation: String
- val globalData: GlobalData
- Definition Classes
- GlobalDataUser
- def hasAssignement: Boolean
- Definition Classes
- BaseType
- def hasDataAssignment: Boolean
- Definition Classes
- BaseType
- def hasInit: Boolean
Does the base type have initial value
Does the base type have initial value
- Definition Classes
- BaseType
- def hasOnlyOneStatement: Boolean
- Definition Classes
- StatementDoubleLinkedContainer
- def hasTag[T <: SpinalTag](clazz: Class[T]): Boolean
- Definition Classes
- SpinalTagReady
- def hasTag(spinalTag: SpinalTag): Boolean
- Definition Classes
- SpinalTagReady
- def hashCode(): Int
- Definition Classes
- OverridedEqualsHashCode → AnyRef → Any
- def head: AssignmentStatement
- Definition Classes
- StatementDoubleLinkedContainer
- def high: Int
Return the upper bound
- final def initFrom(that: AnyRef, target: AnyRef = this): Unit
- Definition Classes
- Data
- def initialFrom(that: AnyRef, target: AnyRef = this): Unit
- Definition Classes
- BaseType
- def insertNext(s: Statement): Unit
- Definition Classes
- Statement
- def instanceAttributes(language: Language): Iterable[Attribute]
- Definition Classes
- SpinalTagReady
- def instanceAttributes: Iterable[Attribute]
- Definition Classes
- SpinalTagReady
- def isAnalog: Boolean
- def isComb: Boolean
- def isCompletelyUnnamed: Boolean
- Definition Classes
- Nameable
- def isDirectionLess: Boolean
- Definition Classes
- Data
- def isEmptyOfTag: Boolean
- Definition Classes
- SpinalTagReady
- def isFrozen(): Boolean
- Definition Classes
- BaseType
- def isInOut: Boolean
- Definition Classes
- Data
- def isInput: Boolean
- Definition Classes
- Data
- def isInputOrInOut: Boolean
- Definition Classes
- Data
- final def isInstanceOf[T0]: Boolean
- Definition Classes
- Any
- final def isNamed: Boolean
- Definition Classes
- Nameable
- def isOutput: Boolean
- Definition Classes
- Data
- def isOutputOrInOut: Boolean
- Definition Classes
- Data
- def isPriorityApplicable(namePriority: Byte): Boolean
- Definition Classes
- Nameable
- def isReg: Boolean
- def isRegOnAssign: Boolean
- def isTypeNode: Boolean
Is the baseType a node
Is the baseType a node
- Definition Classes
- BaseType
- def isUnknown: Bool
- def isUnnamed: Boolean
- Definition Classes
- NameableByComponent → Nameable
- def isUsingResetSignal: Boolean
Is the basetype using reset signal
Is the basetype using reset signal
- Definition Classes
- BaseType
- def isUsingSoftResetSignal: Boolean
Is the basetype using soft reset signal
Is the basetype using soft reset signal
- Definition Classes
- BaseType
- def isVital: Boolean
Check if the baseType is vital
Check if the baseType is vital
- Definition Classes
- BaseType
- val lastScopeStatement: Statement
- Definition Classes
- Statement
- def lsb: Bool
Return the least significant bit
- def msb: Bool
Return the most significant bit
- def mux[T2 <: Data](mappings: (Any, T2)*): T2
Use a SpinalHDL data as a selector for a mux.
Use a SpinalHDL data as a selector for a mux.
- Definition Classes
- BaseType
- See also
- def muxDc[T2 <: Data](mappings: (Any, T2)*): T2
Version of SpinalHDL
muxthat allows Don't Care.Version of SpinalHDL
muxthat allows Don't Care.- Definition Classes
- BaseType
- See also
- def muxList[T2 <: Data](defaultValue: T2, mappings: Seq[(Any, T2)]): T2
Use a
scala.Seqof SpinalHDL data as mux inputs.Use a
scala.Seqof SpinalHDL data as mux inputs.- Definition Classes
- BaseType
- See also
- def muxList[T2 <: Data](mappings: Seq[(Any, T2)]): T2
Use a
scala.Seqof SpinalHDL data as mux inputs.Use a
scala.Seqof SpinalHDL data as mux inputs.- Definition Classes
- BaseType
- See also
- def muxListDc[T2 <: Data](mappings: Seq[(Any, T2)]): T2
Version of SpinalHDL
muxListthat allows Don't Care.Version of SpinalHDL
muxListthat allows Don't Care.- Definition Classes
- BaseType
- See also
- val name: String
- Definition Classes
- Nameable
- val nameableRef: Nameable
- def nandR: Bool
Hardware logical NAND of all bits
- final def ne(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- def newExtract(offset: UInt, size: Int, extract: BitVectorRangedAccessFloating)(implicit loc: Location): BitVector.this.type
Extract a range of bits of the BitVector
- def newExtract(hi: Int, lo: Int, accessFactory: => BitVectorRangedAccessFixed): BitVector.this.type
Extract a range of bits of the BitVector
- def newExtract(bitId: UInt, extract: BitVectorBitAccessFloating): Bool
Extract a bit of the BitVector
- def newExtract(bitId: Int, extract: BitVectorBitAccessFixed): Bool
Extract a bit of the BitVector
- val nextScopeStatement: Statement
- Definition Classes
- Statement
- def noBackendCombMerge(): BitVector.this.type
Put the combinatorial logic driving this signal in a separate process
Put the combinatorial logic driving this signal in a separate process
- Definition Classes
- Data
- def noCombLoopCheck(): BitVector.this.type
Disable combinatorial loop checking for this Data
Disable combinatorial loop checking for this Data
- Definition Classes
- Data
- See also
- def norR: Bool
Hardware logical NOR of all bits
- def normalizeInputs: Unit
- Definition Classes
- BaseType → ExpressionContainer
- final def notify(): Unit
- Definition Classes
- AnyRef
- Annotations
- @HotSpotIntrinsicCandidate() @native()
- final def notifyAll(): Unit
- Definition Classes
- AnyRef
- Annotations
- @HotSpotIntrinsicCandidate() @native()
- def nxorR: Bool
Hardware logical NXOR of all bits
- def onEachAttributes(doIt: (Attribute) => Unit): Unit
- Definition Classes
- SpinalTagReady
- def orMask(that: Bool): BitVector.this.type
- def orR: Bool
Hardware logical OR of all bits
Hardware logical OR of all bits
Equivalent to
this.asBits =/= 0. - def overrideLocalName(name: String): BitVector.this.type
- Definition Classes
- Nameable
- val parent: Data
- Definition Classes
- Data
- val parentScope: ScopeStatement
- Definition Classes
- ContextUser
- def pull(propagateName: Boolean): BitVector.this.type
- Definition Classes
- Data
- def pull(): BitVector.this.type
Pull a signal to the top level (use for debugging)
Pull a signal to the top level (use for debugging)
- Definition Classes
- Data
- def purify(): BitVector.this.type
- Definition Classes
- Data
- def randBoot(u: Unit): BitVector.this.type
Useful for register that doesn't need a reset value in RTL, but need a random value for simulation (avoid x-propagation)
Useful for register that doesn't need a reset value in RTL, but need a random value for simulation (avoid x-propagation)
- Definition Classes
- Data
- val refOwner: RefOwnerType
- Definition Classes
- OwnableRef
- Annotations
- @DontName()
- def reflectNames(): Unit
- Definition Classes
- Nameable
- def remapClockDomain(func: (ClockDomain) => ClockDomain): Unit
- def remapDrivingExpressions(func: (Expression) => Expression): Unit
- Definition Classes
- ExpressionContainer
- def remapExpressions(func: (Expression) => Expression): Unit
- Definition Classes
- DeclarationStatement → ExpressionContainer
- def removeAssignments(data: Boolean = true, init: Boolean = true, initial: Boolean = true): BitVector.this.type
Remove all assignments of the base type
- def removeDataAssignments(): BitVector.this.type
- Definition Classes
- Data
- def removeInitAssignments(): BitVector.this.type
- Definition Classes
- Data
- def removeStatement(): Unit
- def removeStatementFromScope(): Unit
- Definition Classes
- Statement
- def removeTag(spinalTag: SpinalTag): BitVector.this.type
- Definition Classes
- SpinalTagReady
- def removeTags(tags: Iterable[SpinalTag]): BitVector.this.type
- Definition Classes
- SpinalTagReady
- def resized: BitVector.this.type
Return a version of the signal which is allowed to be automatically resized where needed.
Return a version of the signal which is allowed to be automatically resized where needed.
The resize operation is deferred until the point of assignment later. The resize may widen or truncate, retaining the LSB.
- Definition Classes
- Data
- See also
- def rootIF(): Interface
root interface
root interface
- Definition Classes
- Data
- def rootIFList(): List[Interface]
- Definition Classes
- Data
- def rootIFrec(now: Data, lastRoot: List[Interface]): List[Interface]
- Definition Classes
- Data
- def rootScopeStatement: ScopeStatement
- def rotateLeft(that: UInt): T
Left rotation of that Bits
- def rotateRight(that: UInt): T
Right rotation of that Bits
- val scalaTrace: Throwable
- Definition Classes
- ScalaLocated
- def setAll(): BitVector.this.type
Set all bits to
TrueSet all bits to
True- Definition Classes
- Data
- def setAllTo(value: Bool): BitVector.this.type
Set all bits to value
- def setAllTo(value: Boolean): BitVector.this.type
Set all bits to value
- def setAsAnalog(): BitVector.this.type
- def setAsComb(): BitVector.this.type
Set baseType to Combinatorial
- def setAsDirectionLess(): BitVector.this.type
Remove the direction (
in,out,inout) to a signal - def setAsReg(): BitVector.this.type
Set baseType to reg
- def setAsTypeNode(): BitVector.this.type
Set baseType to Node
Set baseType to Node
- Definition Classes
- BaseType
- def setAsVital(): BitVector.this.type
Set the baseType to vital
Set the baseType to vital
- Definition Classes
- BaseType
- def setCompositeName(nameable: Nameable, postfix: String, namePriority: Byte): BitVector.this.type
- Definition Classes
- Nameable
- def setCompositeName(nameable: Nameable, postfix: String, weak: Boolean): BitVector.this.type
- Definition Classes
- Nameable
- def setCompositeName(nameable: Nameable, postfix: String): BitVector.this.type
- Definition Classes
- Nameable
- def setCompositeName(nameable: Nameable, namePriority: Byte): BitVector.this.type
- Definition Classes
- Nameable
- def setCompositeName(nameable: Nameable, weak: Boolean): BitVector.this.type
- Definition Classes
- Nameable
- def setCompositeName(nameable: Nameable): BitVector.this.type
- Definition Classes
- Nameable
- def setLambdaName(isNameBody: => Boolean)(nameGen: => String): BitVector.this.type
- Definition Classes
- Nameable
- def setName(name: String, namePriority: Byte): BitVector.this.type
- Definition Classes
- Nameable
- def setName(name: String, weak: Boolean): BitVector.this.type
- Definition Classes
- Nameable
- def setName(name: String): BitVector.this.type
- Definition Classes
- Nameable
- def setNameAsWeak(): BitVector.this.type
- Definition Classes
- Nameable
- def setOutputAsReg(): BitVector.this.type
Recursively set baseType to reg only for output
Recursively set baseType to reg only for output
- Definition Classes
- Data
- def setPartialName(name: String, namePriority: Byte, owner: Any): BitVector.this.type
- Definition Classes
- Nameable
- def setPartialName(name: String, namePriority: Byte): BitVector.this.type
- Definition Classes
- Nameable
- def setPartialName(name: String, weak: Boolean): BitVector.this.type
- Definition Classes
- Nameable
- def setPartialName(owner: Nameable, name: String, namePriority: Byte): BitVector.this.type
- Definition Classes
- Nameable
- def setPartialName(owner: Nameable, name: String, weak: Boolean): BitVector.this.type
- Definition Classes
- Nameable
- def setPartialName(name: String): BitVector.this.type
- Definition Classes
- Nameable
- def setPartialName(owner: Nameable, name: String): BitVector.this.type
- Definition Classes
- Nameable
- def setPartialName(owner: Nameable): BitVector.this.type
- Definition Classes
- Nameable
- def setRefOwner(that: Any): Unit
- Definition Classes
- OwnableRef
- def setScalaLocated(source: ScalaLocated): BitVector.this.type
- Definition Classes
- ScalaLocated
- def setWeakName(name: String): BitVector.this.type
- Definition Classes
- Nameable
- def setWidth(width: Int): BitVector.this.type
Set the width of the BitVector
Set the width of the BitVector
- width
the width of the data
- returns
the BitVector of a given size
- def simplifyNode: Expression
- Definition Classes
- Expression
- def sliceBy(divisor: List[Int]): List[Bits]
- def sliceBy(divisor: Int*): List[Bits]
apart by a list of width
apart by a list of width
- returns
(List(A(1 downto 0), A(2 downto 4), A(9 downto 3))
val res = A.sliceBy(2, 3, 5) val res = A.sliceBy(List(2, 3, 5))
Example: - def spinalTags: LinkedHashSet[SpinalTag]
- Definition Classes
- SpinalTagReady
- def splitAt(n: Int): (Bits, Bits)
Split at n st bits
Split at n st bits
- returns
(data10bits(8 downto 4), data10bits(3 downto 0))
val res = data10bits.splitAt(4)
Example: - def stabilized(func: (Expression) => Expression, seed: Expression): Expression
- Definition Classes
- ExpressionContainer
- def subdivideIn(sliceWidth: BitCount): Vec[T]
- def subdivideIn(sliceCount: SlicesCount): Vec[T]
- def subdivideIn(sliceWidth: BitCount, strict: Boolean): Vec[T]
Split the BitVector into slice of x bits
Split the BitVector into slice of x bits
- sliceWidth
the width of the slice
- strict
allow
subdivideInto generate vectors with varying size- returns
a Vector of slices
val res = myBits.subdivideIn(3 bits)
Example: - def subdivideIn(sliceCount: SlicesCount, strict: Boolean): Vec[T]
Split the BitVector into x slice
Split the BitVector into x slice
- sliceCount
the width of the slice
- strict
allow
subdivideInto generate vectors with varying size- returns
a Vector of slices
val res = myBits.subdivideIn(3 slices)
Example: - final def synchronized[T0](arg0: => T0): T0
- Definition Classes
- AnyRef
- def take(n: Int): Bits
Take lowest n bits
Take lowest n bits
- returns
data10bits(3 downto 0)
val res = data10bits.take(4)
Example: - def takeHigh(n: Int): Bits
Take highest n bits
Take highest n bits
- returns
data10bits(9 downto 6)
val res = data10bits.takeHigh(4)
Example: - def takeLow(n: Int): Bits
- def toIo(): BitVector.this.type
- Definition Classes
- Data
- def toMuxInput[T <: Data](muxOutput: T): T
- Definition Classes
- Data
- def toString(): String
- Definition Classes
- BitVector → BaseType → Expression → Nameable → AnyRef → Any
- def toStringMultiLine(): String
- Definition Classes
- BaseNode
- def toStringRec(level: Int = 1): String
- Definition Classes
- Expression
- def unfreeze(): BitVector.this.type
- def unsetName(): BitVector.this.type
- Definition Classes
- Nameable
- final def wait(arg0: Long, arg1: Int): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException]) @native()
- final def wait(): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- def walkDrivingExpressions(func: (Expression) => Unit): Unit
- Definition Classes
- ExpressionContainer
- def walkExpression(func: (Expression) => Unit): Unit
- Definition Classes
- ExpressionContainer
- def walkExpressionPostorder(func: (Expression) => Unit): Unit
- Definition Classes
- ExpressionContainer
- def walkParentTreeStatements(func: (TreeStatement) => Unit): Unit
- Definition Classes
- Statement
- def walkParentTreeStatementsUntilRootScope(func: (TreeStatement) => Unit): Unit
- Definition Classes
- Statement
- def walkRemapDrivingExpressions(func: (Expression) => Expression): Unit
- Definition Classes
- ExpressionContainer
- def walkRemapExpressions(func: (Expression) => Expression): Unit
- Definition Classes
- ExpressionContainer
- def wrapCast[T <: BaseType](result: T, node: Cast): T
- Definition Classes
- BaseType
- def wrapNext(): BitVector.this.type
- Definition Classes
- Data
- def xorMask(that: Bool): BitVector.this.type
- def xorR: Bool
Hardware logical XOR of all bits
Hardware logical XOR of all bits
Equivalent to
this.asBools.reduce(_ ^ _).
Deprecated Value Members
- def asDirectionLess(): BitVector.this.type
- Definition Classes
- Data
- Annotations
- @deprecated
- Deprecated
(Since version ???) use setAsDirectionLess instead
- def finalize(): Unit
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.Throwable]) @Deprecated
- Deprecated
(Since version 9)
- def genIf(cond: Boolean): BitVector.this.type
Generate this if condition is true
Generate this if condition is true
- Definition Classes
- Data
- Annotations
- @deprecated
- Deprecated
does not work with <>, use 'someBool generate Type()' or 'if(condition) Type() else null' instead
- def range: Range
Return the range
Return the range
- Annotations
- @deprecated
- Deprecated
Use bitsRange instead