t

spinal.lib.bus.misc

BusSlaveFactory

trait BusSlaveFactory extends Area

Bus slave factory is a tool that provide an abstract and smooth way to define register bank

Linear Supertypes
Area, Nameable, ContextUser, ScalaLocated, GlobalDataUser, OwnableRef, AnyRef, Any
Known Subclasses
Apb3SlaveFactory, AxiLite4SlaveFactory, AvalonMMSlaveFactory, BusSlaveFactoryAddressWrapper, BusSlaveFactoryDelayed, AsyncMemoryBusFactory
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Inherited
  1. BusSlaveFactory
  2. Area
  3. Nameable
  4. ContextUser
  5. ScalaLocated
  6. GlobalDataUser
  7. OwnableRef
  8. AnyRef
  9. Any
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Visibility
  1. Public
  2. All

Type Members

  1. abstract type RefOwnerType
    Definition Classes
    OwnableRef

Abstract Value Members

  1. abstract def busDataWidth: Int

    Return the data width of the bus

  2. abstract def nonStopWrite[T <: Data](that: T, bitOffset: Int = 0, documentation: String = null): T

    Permanently assign that by the bus write data from bitOffset

  3. abstract def onReadPrimitive(address: AddressMapping, haltSensitive: Boolean, documentation: String)(doThat: ⇒ Unit): Unit
  4. abstract def onWritePrimitive(address: AddressMapping, haltSensitive: Boolean, documentation: String)(doThat: ⇒ Unit): Unit
  5. abstract def readAddress(): UInt
  6. abstract def readHalt(): Unit
  7. abstract def readPrimitive[T <: Data](that: T, address: AddressMapping, bitOffset: Int, documentation: String): Unit
  8. abstract def writeAddress(): UInt
  9. abstract def writeHalt(): Unit
  10. abstract def writePrimitive[T <: Data](that: T, address: AddressMapping, bitOffset: Int, documentation: String): Unit

Concrete Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##(): Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. val _config: BusSlaveFactoryConfig

    Configuration of the BusSlaveFactory

    Configuration of the BusSlaveFactory

    Attributes
    protected
  5. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  6. def clone(): AnyRef
    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @native() @throws( ... )
  7. def component: Component
    Definition Classes
    ContextUser
  8. def createAndDriveFlow[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0): Flow[T]

    Create a writable Flow register of type dataType at address and placed at bitOffset in the word

  9. def createReadAndClearOnSet[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0): T
  10. def createReadAndWrite[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T

    Create a read write register of type dataType at address and placed at bitOffset in the word

  11. def createReadMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T

    Create multi-words read register of type dataType

  12. def createReadOnly[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T

    Create a read only register of type dataType at address and placed at bitOffset in the word

  13. def createWriteAndReadMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T

    Create multi-words write and read register of type dataType

  14. def createWriteMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T

    Create multi-words write register of type dataType

  15. def createWriteOnly[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T

    Create a write only register of type dataType at address and placed at bitOffset in the word

  16. def doBitsAccumulationAndClearOnRead(that: Bits, address: BigInt, bitOffset: Int = 0): Unit

    Instanciate an internal register which at each cycle do : reg := reg | that Then when a read occur, the register is cleared.

    Instanciate an internal register which at each cycle do : reg := reg | that Then when a read occur, the register is cleared. This register is readable at address and placed at bitOffset in the word

  17. def drive[T <: Data](that: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T

    Drive that with a register writable at address placed at bitOffset in the word

  18. def driveAndRead[T <: Data](that: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T

    Drive that with a register writable and readable at address placed at bitOffset in the word

  19. def driveAndReadMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T

    Drive and read that on multi-word

  20. def driveFlow[T <: Data](that: Flow[T], address: BigInt, bitOffset: Int = 0): Unit

    Emit on that a transaction when a write happen at address by using data placed at bitOffset in the word

  21. def driveMultiWord[T <: Data](that: T, address: BigInt, documentation: String = null): T

    Drive that on multi-words

  22. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  23. def equals(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  24. def finalize(): Unit
    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  25. def foreachReflectableNameables(doThat: (Any) ⇒ Unit): Unit
    Definition Classes
    Nameable
  26. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native()
  27. def getConfig: BusSlaveFactoryConfig
  28. def getDisplayName(): String
    Definition Classes
    Nameable
  29. def getInstanceCounter: Int
    Definition Classes
    ContextUser
  30. def getName(default: String): String
    Definition Classes
    Nameable
  31. def getName(): String
    Definition Classes
    Nameable
  32. def getRefOwnersChain(): List[Any]
    Definition Classes
    OwnableRef
  33. def getScalaLocationLong: String
    Definition Classes
    ScalaLocated
  34. def getScalaLocationShort: String
    Definition Classes
    ScalaLocated
  35. def getScalaTrace(): Throwable
    Definition Classes
    ContextUser → ScalaLocated
  36. val globalData: GlobalData
    Definition Classes
    GlobalDataUser
  37. def hashCode(): Int
    Definition Classes
    AnyRef → Any
    Annotations
    @native()
  38. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  39. def isNamed: Boolean
    Definition Classes
    Nameable
  40. def isReading(address: BigInt): Bool

    Return true if the bus is reading

  41. def isUnnamed: Boolean
    Definition Classes
    Nameable
  42. def isWriting(address: BigInt): Bool

    Return true if the bus is writing

  43. def multiCycleRead(address: AddressMapping, cycles: BigInt): Unit
  44. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  45. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native()
  46. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native()
  47. def onRead(address: BigInt, documentation: String = null)(doThat: ⇒ Unit): Unit

    Call doThat when a read transaction occurs on address

  48. def onWrite(address: BigInt, documentation: String = null)(doThat: ⇒ Unit): Unit

    Call doThat when a write transaction occurs on address

  49. val parentScope: ScopeStatement
    Definition Classes
    ContextUser
  50. def read[T <: Data](that: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T

    When the bus read the address, fill the response with that at bitOffset

  51. def readAddress(address: AddressMapping): UInt
  52. def readAndClearOnSet[T <: Data](that: T, address: BigInt, bitOffset: Int = 0): T
  53. def readAndWrite(that: Data, address: BigInt, bitOffset: Int = 0, documentation: String = null): Unit

    Make that readable and writable at address and placed at bitOffset in the word

  54. def readAndWriteMultiWord(that: Data, address: BigInt, documentation: String = null): Unit

    Create the memory mapping to write/read that from address

  55. def readMultiWord(that: Data, address: BigInt, documentation: String = null): Unit

    Create the memory mapping to read that from address If that is bigger than one word it extends the register on followings addresses

  56. def readStreamNonBlocking[T <: Data](that: Stream[T], address: BigInt, validBitOffset: Int, payloadBitOffset: Int): Unit

    Read that and consume the transaction when a read happen at address.

  57. def readStreamNonBlocking[T <: Data](that: Stream[T], address: BigInt): Unit

    Read that (that is bigger than the busWidth) and consume the transaction when a read happen at address.

    Read that (that is bigger than the busWidth) and consume the transaction when a read happen at address.

    Note

    in order to avoid to read wrong data read first the address which contains the valid signal. Little : payload - valid at address 0x00 Big : valid - payload at address 0x00 Once the valid signal is true you can read all registers

  58. def readSyncMemWordAligned[T <: Data](mem: Mem[T], addressOffset: BigInt, bitOffset: Int = 0): Mem[T]
  59. val refOwner: RefOwnerType
    Definition Classes
    OwnableRef
    Annotations
    @dontName()
  60. def reflectNames(): Unit
    Definition Classes
    Area
  61. def setCompositeName(nameable: Nameable, postfix: String, weak: Boolean): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  62. def setCompositeName(nameable: Nameable, postfix: String): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  63. def setCompositeName(nameable: Nameable, weak: Boolean): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  64. def setCompositeName(nameable: Nameable): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  65. def setConfig(value: BusSlaveFactoryConfig): BusSlaveFactory.this.type
  66. def setName(name: String, weak: Boolean): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  67. def setPartialName(name: String, weak: Boolean): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  68. def setPartialName(owner: Nameable, name: String, weak: Boolean): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  69. def setPartialName(name: String): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  70. def setPartialName(owner: Nameable, name: String): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  71. def setRefOwner(that: Any): Unit
    Definition Classes
    OwnableRef
  72. def setScalaLocated(source: ScalaLocated): BusSlaveFactory.this.type
    Definition Classes
    ScalaLocated
  73. def setWeakName(name: String): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  74. def setWordEndianness(value: Endianness): BusSlaveFactory

    Set the endianness during write/read multiword

  75. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  76. def toString(): String
    Definition Classes
    Area → Nameable → AnyRef → Any
  77. def unsetName(): BusSlaveFactory.this.type
    Definition Classes
    Nameable
  78. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  79. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  80. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @throws( ... )
  81. def wordAddressInc: Int

    Address incrementation used by the read and write multi words registers

  82. def write[T <: Data](address: BigInt, bitMapping: (Int, Data)*): Unit
  83. def write[T <: Data](that: T, address: BigInt, bitOffset: Int = 0, documentation: String = null): T

    When the bus write the address, assign that with bus’s data from bitOffset

  84. def writeAddress(address: AddressMapping): UInt
  85. def writeMemWordAligned[T <: Data](mem: Mem[T], addressOffset: BigInt, bitOffset: Int = 0): Mem[T]
  86. def writeMultiWord(that: Data, address: BigInt, documentation: String = null): Unit

    Create the memory mapping to write that at address.

    Create the memory mapping to write that at address. If that is bigger than one word it extends the register on followings addresses

Deprecated Value Members

  1. def createReadWrite[T <: Data](dataType: T, address: BigInt, bitOffset: Int = 0): T
    Annotations
    @deprecated
    Deprecated

    Use createReadAndWrite instead

Inherited from Area

Inherited from Nameable

Inherited from ContextUser

Inherited from ScalaLocated

Inherited from GlobalDataUser

Inherited from OwnableRef

Inherited from AnyRef

Inherited from Any

Ungrouped