Lucre-confluent/de.sciss.lucre.confluent.impl/TxnMixin

TxnMixin

trait TxnMixin[Tx <: Txn[Tx], D1 <: Txn[D1], I1 <: Txn[I1]] extends Txn[Tx] with BasicTxnImpl[Tx, I1] with Modifiable
trait BasicTxnImpl[Tx, I1]
trait Txn[Tx]
trait Txn[Tx]
trait TxnLike
trait Exec[Tx]
class Object
trait Matchable
class Any
trait RegularTxnMixin[Tx, D1, I1]
trait RootTxnMixin[Tx, D1, I1]
Tx

Type members

Types

override
type D = D1
override
type I = I1
type T = Tx

Inherited types

type Acc = Access[T]
Inherited from
Txn
type Id = Ident[T]
Inherited from
Txn
type Var[A] = Var[T, A]
Inherited from
Txn

Value members

Abstract methods

protected
def flushCaches(meld: MeldInfo[T], newVersion: Boolean, caches: IndexedSeq[Cache[T]]): Unit

Concrete methods

final
def addDirtyCache(map: Cache[T]): Unit
final
def addDirtyLocalCache(map: Cache[T]): Unit

A local cache is one which is re-created upon application restart. It should probably be called transient instead of local, but we already have stm.LocalVar...

A local cache is one which is re-created upon application restart. It should probably be called transient instead of local, but we already have stm.LocalVar...

If the dirty maps only contain local caches, no new version is created upon flush.

final
def addInputVersion(path: Access[T]): Unit
def attrMap(obj: Obj[T]): AttrMap[T]
override
def attrMapOption(obj: Obj[T]): Option[AttrMap[T]]
Definition Classes
Txn
final override
def beforeCommit(fun: T => Unit): Unit
Definition Classes
BasicTxnImpl -> Txn
final protected
def fullCache: Durable[T, Int, DurablePersistentMap[T, Int]]
final
def getNonTxn[A](id: Id)(implicit format: ConstFormat[A]): A
final
def getTxn[A](id: Id)(implicit format: TFormat[T, A]): A
final
def info: Modifiable
final protected
def meldInfo: MeldInfo[T]
final
def newHandle[A](value: A)(implicit format: TFormat[T, A]): Source[T, A]
final
def newHandleM[A](value: A)(implicit format: TFormat[T, A]): Source[T, A]
final
def newId(): Id
final override
def newIdentMap[A]: IdentMap[T, A]
Definition Classes
Exec
final
def putNonTxn[A](id: Id, value: A)(implicit format: ConstFormat[A]): Unit
final
def putTxn[A](id: Id, value: A)(implicit format: TFormat[T, A]): Unit
final override
def readId(in: DataInput): Id
Definition Classes
Exec
final
def readTreeVertexLevel(term: Long): Int
final
def removeFromCache(id: Id): Unit
override
def toString: String
Definition Classes
Any

Inherited methods

def afterCommit(code: => Unit): Unit
Inherited from
BasicTxnImpl
def inMemory: I
Inherited from
Exec
def inputAccess: Acc
Inherited from
Txn
def isRetroactive: Boolean
Inherited from
Txn
def newInMemoryMap[K, V]: RefMap[Tx, K, V]
Inherited from
BasicTxnImpl
def newInMemorySet[A]: RefSet[Tx, A]
Inherited from
BasicTxnImpl
def newRef[A](init: A): Ref[Tx, A]
Inherited from
BasicTxnImpl
def peer: InTxn

Every transaction has a plain Scala-STM transaction as a peer. This comes handy for setting up custom things like TxnLocal, TMap, or calling into the hooks of concurrent.stm.Txn. It is also needed when re-wrapping the transaction of one system into another.

Every transaction has a plain Scala-STM transaction as a peer. This comes handy for setting up custom things like TxnLocal, TMap, or calling into the hooks of concurrent.stm.Txn. It is also needed when re-wrapping the transaction of one system into another.

Inherited from
TxnLike
def system: ConfluentLike[Tx] { type I = I; }
Inherited from
Txn

Concrete fields

final
var message: String
final
val timeStamp: Long

Implicits

Implicits

implicit
def inMemoryCursor: Cursor[I]

Inherited implicits

implicit
def durable: D
Inherited from
Txn
implicit
def durableBridge: Tx => D
Inherited from
Txn
implicit
def inMemoryBridge: Tx => I
Inherited from
Exec