de.sciss.synth.ugen

Latch

final case class Latch(rate: Rate, in: GE, trig: GE = synth.this.GE.const(1)) extends SingleOut with Product with Serializable

A sample-and-hold UGen. When triggered, a new value is taken from the input and hold until the next trigger occurs.

in

the input signal

trig

the trigger. The can be any signal. A trigger happens when the signal changes from non-positive to positive.

See also

de.sciss.synth.ugen.Demand

de.sciss.synth.ugen.Gate

Linear Supertypes
SingleOut, SomeOut, GE.Lazy, GE, UGenSource[UGenInLike], Product, Equals, Expander[UGenInLike], Lazy, Serializable, Serializable, AnyRef, Any
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Inherited
  1. Latch
  2. SingleOut
  3. SomeOut
  4. Lazy
  5. GE
  6. UGenSource
  7. Product
  8. Equals
  9. Expander
  10. Lazy
  11. Serializable
  12. Serializable
  13. AnyRef
  14. Any
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Instance Constructors

  1. new Latch(rate: Rate, in: GE, trig: GE = synth.this.GE.const(1))

    in

    the input signal

    trig

    the trigger. The can be any signal. A trigger happens when the signal changes from non-positive to positive.

Value Members

  1. final def !=(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef

  2. final def !=(arg0: Any): Boolean

    Definition Classes
    Any

  3. final def ##(): Int

    Definition Classes
    AnyRef → Any

  4. final def ==(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef

  5. final def ==(arg0: Any): Boolean

    Definition Classes
    Any

  6. final def asInstanceOf[T0]: T0

    Definition Classes
    Any

  7. def clone(): AnyRef

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws()

  8. final def eq(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef

  9. def finalize(): Unit

    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws()

  10. final def getClass(): Class[_]

    Definition Classes
    AnyRef → Any

  11. val in: GE

    the input signal

  12. final def isInstanceOf[T0]: Boolean

    Definition Classes
    Any

  13. def makeUGen(_args: IndexedSeq[UGenIn]): UGenInLike

    Attributes
    protected
    Definition Classes
    Latch → UGenSource

  14. def makeUGens: UGenInLike

    Attributes
    protected
    Definition Classes
    Latch → Expander

  15. final def name: String

    Definition Classes
    UGenSource

  16. final def ne(arg0: AnyRef): Boolean

    Definition Classes
    AnyRef

  17. final def notify(): Unit

    Definition Classes
    AnyRef

  18. final def notifyAll(): Unit

    Definition Classes
    AnyRef

  19. val rate: Rate

    Definition Classes
    Latch → GE

  20. final def rewrap(args: IndexedSeq[UGenInLike], exp: Int): UGenInLike

    Attributes
    protected
    Definition Classes
    SomeOut → UGenSource

  21. final def synchronized[T0](arg0: ⇒ T0): T0

    Definition Classes
    AnyRef

  22. val trig: GE

    the trigger.

    the trigger. The can be any signal. A trigger happens when the signal changes from non-positive to positive.

  23. final def unwrap(args: IndexedSeq[UGenInLike]): UGenInLike

    Attributes
    protected
    Definition Classes
    UGenSource

  24. final def wait(): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws()

  25. final def wait(arg0: Long, arg1: Int): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws()

  26. final def wait(arg0: Long): Unit

    Definition Classes
    AnyRef
    Annotations
    @throws()

Inherited from SingleOut

Inherited from SomeOut

Inherited from GE.Lazy

Inherited from GE

Inherited from UGenSource[UGenInLike]

Inherited from Product

Inherited from Equals

Inherited from Expander[UGenInLike]

Inherited from Lazy

Inherited from Serializable

Inherited from Serializable

Inherited from AnyRef

Inherited from Any

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