Trait/Object

chisel3.util.random

LFSR

Related Docs: object LFSR | package random

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trait LFSR extends PRNG

Trait that defines a Linear Feedback Shift Register (LFSR).

If the user specifies a seed, then a compile-time check is added that they are not initializing the LFSR to a state which will cause it to lock up. If the user does not set a seed, then the least significant bit of the state will be set or reset based on the choice of reduction operator.

Source
LFSR.scala
See also

https://en.wikipedia.org/wiki/Linear-feedback_shift_register

GaloisLFSR

FibonacciLFSR

Linear Supertypes
Known Subclasses
Type Hierarchy
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Inherited
  1. LFSR
  2. PRNG
  3. LegacyModule
  4. MultiIOModule
  5. RawModule
  6. BaseModule
  7. HasId
  8. InstanceId
  9. AnyRef
  10. Any
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Abstract Value Members

  1. abstract def delta(s: Seq[Bool]): Seq[Bool]

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    State update function

    State update function

    s

    input state

    returns

    the next state

    Definition Classes
    PRNG
  2. abstract def reduction: LFSRReduce

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    The binary reduction operation used by this LFSR, either XOR or XNOR.

    The binary reduction operation used by this LFSR, either XOR or XNOR. This has the effect of mandating what seed is invalid.

Concrete Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: T): T

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    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data): Unit

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    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _compatAutoWrapPorts(): Unit

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    Definition Classes
    BaseModule
  8. def _compatIoPortBound(): Boolean

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    Attributes
    protected
    Definition Classes
    LegacyModule
  9. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any
  10. def circuitName: String

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    Attributes
    protected
    Definition Classes
    HasId
  11. final val clock: Clock

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    Definition Classes
    MultiIOModule
  12. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  13. val compileOptions: CompileOptions

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    Definition Classes
    RawModule
  14. def computeName(defaultPrefix: Option[String], defaultSeed: Option[String]): Option[String]

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    Definition Classes
    HasId
  15. def desiredName: String

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    Definition Classes
    BaseModule
  16. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  17. def equals(that: Any): Boolean

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    Definition Classes
    HasId → AnyRef → Any
  18. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  19. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any
  20. def getCommands: Seq[Command]

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    Attributes
    protected
    Definition Classes
    RawModule
  21. def getIds: Seq[HasId]

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    Attributes
    protected
    Definition Classes
    BaseModule
  22. def getModulePorts: Seq[Data]

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    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  23. lazy val getPorts: Seq[Port]

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    Definition Classes
    RawModule
  24. def hasSeed: Boolean

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    Definition Classes
    HasId
  25. def hashCode(): Int

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    Definition Classes
    HasId → AnyRef → Any
  26. def instanceName: String

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    Definition Classes
    BaseModule → HasId → InstanceId
  27. val io: PRNGIO

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    Definition Classes
    PRNG → LegacyModule
  28. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any
  29. final lazy val name: String

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    Definition Classes
    BaseModule
  30. def nameIds(rootClass: Class[_]): HashMap[HasId, String]

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    Attributes
    protected
    Definition Classes
    BaseModule
  31. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef
  32. final def nextState(s: Seq[Bool]): Seq[Bool]

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    The method that will be used to update the state of this PRNG

    The method that will be used to update the state of this PRNG

    s

    input state

    returns

    the next state after step applications of PRNG.delta

    Definition Classes
    PRNG
  33. final def notify(): Unit

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    Definition Classes
    AnyRef
  34. final def notifyAll(): Unit

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    Definition Classes
    AnyRef
  35. var override_clock: Option[Clock]

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    Attributes
    protected
    Definition Classes
    LegacyModule
  36. var override_reset: Option[Bool]

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    Attributes
    protected
    Definition Classes
    LegacyModule
  37. def parentModName: String

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    Definition Classes
    HasId → InstanceId
  38. def parentPathName: String

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    Definition Classes
    HasId → InstanceId
  39. def pathName: String

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    Definition Classes
    HasId → InstanceId
  40. def portsContains(elem: Data): Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule
  41. def portsSize: Int

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    Attributes
    protected
    Definition Classes
    BaseModule
  42. final val reset: Reset

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    Definition Classes
    MultiIOModule
  43. def resetValue: Vec[Bool]

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    Allow implementations to override the reset value, e.g., if some bits should be don't-cares.

    Allow implementations to override the reset value, e.g., if some bits should be don't-cares.

    Attributes
    protected
    Definition Classes
    LFSRPRNG
  44. val seed: Option[BigInt]

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    the initial state of the PRNG

    the initial state of the PRNG

    Definition Classes
    PRNG
  45. def suggestName(seed: ⇒ String): LFSR.this.type

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    Definition Classes
    HasId
  46. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef
  47. final def toAbsoluteTarget: IsModule

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    Definition Classes
    BaseModule → InstanceId
  48. final def toNamed: ModuleName

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    Definition Classes
    BaseModule → InstanceId
  49. def toString(): String

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    Definition Classes
    AnyRef → Any
  50. final def toTarget: ModuleTarget

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    Definition Classes
    BaseModule → InstanceId
  51. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  52. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  53. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  54. val width: Int

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    the width of the PRNG

    the width of the PRNG

    Definition Classes
    PRNG

Inherited from PRNG

Inherited from LegacyModule

Inherited from MultiIOModule

Inherited from RawModule

Inherited from BaseModule

Inherited from HasId

Inherited from internal.InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped