object Driver extends BackendCompilationUtilities
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!=(arg0: Any): Boolean
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final
def
##(): Int
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final
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lazy val
TestDirectory: File
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final
def
asInstanceOf[T0]: T0
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- val chiselVersionString: String
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def
clone(): AnyRef
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def
compileFirrtlToVerilog(prefix: String, dir: File): Boolean
Compile Chirrtl to Verilog by invoking Firrtl inside the same JVM
Compile Chirrtl to Verilog by invoking Firrtl inside the same JVM
- prefix
basename of the file
- dir
directory where file lives
- returns
true if compiler completed successfully
- Definition Classes
- BackendCompilationUtilities
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def
copyResourceToFile(name: String, file: File): Unit
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def
cppToExe(prefix: String, dir: File): ProcessBuilder
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def
createTestDirectory(testName: String): File
- Definition Classes
- BackendCompilationUtilities
- def dumpFirrtl(ir: Circuit, optName: Option[File]): File
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def
elaborate[T <: RawModule](gen: () ⇒ T): Circuit
Elaborates the Module specified in the gen function into a Circuit
Elaborates the Module specified in the gen function into a Circuit
- gen
a function that creates a Module hierarchy
- returns
the resulting Chisel IR in the form of a Circuit (TODO: Should be FIRRTL IR)
- def emit[T <: RawModule](ir: Circuit): String
- def emit[T <: RawModule](gen: () ⇒ T): String
-
def
emitVerilog[T <: RawModule](gen: ⇒ T): String
Elaborates the Module specified in the gen function into Verilog
Elaborates the Module specified in the gen function into Verilog
- gen
a function that creates a Module hierarchy
- returns
the resulting String containing the design in Verilog
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final
def
eq(arg0: AnyRef): Boolean
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def
equals(arg0: Any): Boolean
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def
execute(args: Array[String], dut: () ⇒ RawModule): ChiselExecutionResult
Run the chisel3 compiler and possibly the firrtl compiler with options specified via an array of Strings
Run the chisel3 compiler and possibly the firrtl compiler with options specified via an array of Strings
- args
The options specified, command line style
- dut
The device under test
- returns
An execution result with useful stuff, or failure with message
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def
execute(optionsManager: ExecutionOptionsManager with HasChiselExecutionOptions with HasFirrtlOptions, dut: () ⇒ RawModule): ChiselExecutionResult
Run the chisel3 compiler and possibly the firrtl compiler with options specified
Run the chisel3 compiler and possibly the firrtl compiler with options specified
- optionsManager
The options specified
- dut
The device under test
- returns
An execution result with useful stuff, or failure with message
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def
executeExpectingFailure(prefix: String, dir: File, assertionMsg: String): Boolean
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def
executeExpectingSuccess(prefix: String, dir: File): Boolean
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def
finalize(): Unit
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def
firrtlToVerilog(prefix: String, dir: File): ProcessBuilder
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final
def
getClass(): Class[_]
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def
hashCode(): Int
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final
def
isInstanceOf[T0]: Boolean
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def
main(args: Array[String]): Unit
This is just here as command line way to see what the options are It will not successfully run TODO: Look into dynamic class loading as way to make this main useful
This is just here as command line way to see what the options are It will not successfully run TODO: Look into dynamic class loading as way to make this main useful
- args
unused args
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def
makeHarness(template: (String) ⇒ String, post: String)(f: File): File
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final
def
ne(arg0: AnyRef): Boolean
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def
notify(): Unit
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def
notifyAll(): Unit
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final
def
synchronized[T0](arg0: ⇒ T0): T0
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- def targetDir(): String
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def
timeStamp: String
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def
toString(): String
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def
verilogToCpp(dutFile: String, dir: File, vSources: Seq[File], cppHarness: File): ProcessBuilder
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- BackendCompilationUtilities
- val version: String
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final
def
wait(): Unit
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final
def
wait(arg0: Long, arg1: Int): Unit
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final
def
wait(arg0: Long): Unit
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This is the documentation for Chisel.
Package structure
The chisel3 package presents the public API of Chisel. It contains the concrete core types
UInt
,SInt
,Bool
,FixedPoint
,Clock
, andReg
, the abstract typesBits
,Aggregate
, andData
, and the aggregate typesBundle
andVec
.The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.
Utility objects and methods are found in the
util
package.The
testers
package defines the basic interface for chisel testers.