Packages

c

Chisel

CompatibilityModule

abstract class CompatibilityModule extends LegacyModule

Linear Supertypes
LegacyModule, ImplicitModule, UserModule, BaseModule, HasId, InstanceId, AnyRef, Any
Type Hierarchy
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. CompatibilityModule
  2. LegacyModule
  3. ImplicitModule
  4. UserModule
  5. BaseModule
  6. HasId
  7. InstanceId
  8. AnyRef
  9. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new CompatibilityModule(_clock: Clock, _reset: Bool)(implicit moduleCompileOptions: CompileOptions)
  2. new CompatibilityModule(_reset: Bool)(implicit moduleCompileOptions: CompileOptions)
  3. new CompatibilityModule(_clock: Clock)(implicit moduleCompileOptions: CompileOptions)
  4. new CompatibilityModule(override_clock: Option[Clock] = None, override_reset: Option[Bool] = None)(implicit moduleCompileOptions: CompileOptions)

Abstract Value Members

  1. abstract def io: chisel3.core.Record
    Definition Classes
    LegacyModule

Concrete Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##(): Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def IO[T <: chisel3.core.Data](iodef: T): iodef.type
    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _autoWrapPorts(): Unit
    Definition Classes
    CompatibilityModule → BaseModule
  6. var _closed: Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _ioPortBound(): Boolean
    Attributes
    protected
    Definition Classes
    LegacyModule
  8. def annotate(annotation: ChiselAnnotation): Unit
    Attributes
    protected
    Definition Classes
    BaseModule
  9. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  10. val clock: chisel3.core.Clock
    Definition Classes
    ImplicitModule
  11. def clone(): AnyRef
    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  12. val compileOptions: CompileOptions
    Definition Classes
    UserModule
  13. def desiredName: String
    Definition Classes
    BaseModule
  14. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  15. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  16. def finalize(): Unit
    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  17. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
  18. def getCommands: Seq[Command]
    Attributes
    protected
    Definition Classes
    UserModule
  19. def getIds: Seq[HasId]
    Attributes
    protected
    Definition Classes
    BaseModule
  20. def getModulePorts: Seq[chisel3.core.Data]
    Attributes
    protected
    Definition Classes
    BaseModule
  21. lazy val getPorts: Seq[Port]
    Definition Classes
    UserModule
  22. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  23. def instanceName: String
    Definition Classes
    BaseModule → HasId → InstanceId
  24. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  25. final val name: String
    Definition Classes
    BaseModule
  26. def nameIds(rootClass: Class[_]): HashMap[HasId, String]
    Attributes
    protected
    Definition Classes
    LegacyModule → BaseModule
  27. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  28. final def notify(): Unit
    Definition Classes
    AnyRef
  29. final def notifyAll(): Unit
    Definition Classes
    AnyRef
  30. var override_clock: Option[chisel3.core.Clock]
    Attributes
    protected
    Definition Classes
    LegacyModule
  31. var override_reset: Option[chisel3.core.Bool]
    Attributes
    protected
    Definition Classes
    LegacyModule
  32. def parentModName: String
    Definition Classes
    HasId → InstanceId
  33. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  34. def pathName: String
    Definition Classes
    HasId → InstanceId
  35. def portsContains(elem: chisel3.core.Data): Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  36. def portsSize: Int
    Attributes
    protected
    Definition Classes
    BaseModule
  37. val reset: chisel3.core.Reset
    Definition Classes
    ImplicitModule
  38. def suggestName(name: ⇒ String): CompatibilityModule.this.type
    Definition Classes
    HasId
  39. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  40. def toString(): String
    Definition Classes
    AnyRef → Any
  41. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  42. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  43. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Inherited from LegacyModule

Inherited from ImplicitModule

Inherited from UserModule

Inherited from BaseModule

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped