Chisel
package Chisel
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Type Members
- implicit class AddDirMethodToData[T <: Data] extends AnyRef
- implicit class AddDirectionToData[T <: Data] extends AnyRef
- type Aggregate = chisel3.Aggregate
- type Arbiter[T <: Data] = chisel3.util.Arbiter[T]
- type ArbiterIO[T <: Data] = chisel3.util.ArbiterIO[T]
- type BackendCompilationUtilities = firrtl.util.BackendCompilationUtilities
- type BitPat = chisel3.util.BitPat
- type Bits = chisel3.Bits
- implicit class BitsCompatibility extends AnyRef
- implicit class BitsObjectCompatibility extends AnyRef
- abstract class BlackBox extends chisel3.BlackBox
- type Bool = chisel3.Bool
-
trait
BoolFactory extends chisel3.BoolFactory
This contains literal constructor factory methods that are deprecated as of Chisel3.
- type Bundle = chisel3.Bundle
- type ChiselException = chisel3.internal.ChiselException
- type Clock = chisel3.Clock
- abstract class CompatibilityModule extends LegacyModule
- type Counter = chisel3.util.Counter
- type Data = chisel3.Data
- implicit class DataCompatibility extends AnyRef
- type DecoupledIO[+T <: Data] = chisel3.util.DecoupledIO[T]
- abstract class Direction extends AnyRef
- type Element = chisel3.Element
- type LockingArbiter[T <: Data] = chisel3.util.LockingArbiter[T]
- type LockingArbiterLike[T <: Data] = chisel3.util.LockingArbiterLike[T]
- type LockingRRArbiter[T <: Data] = chisel3.util.LockingRRArbiter[T]
- type Mem[T <: Data] = chisel3.Mem[T]
- type MemBase[T <: Data] = chisel3.MemBase[T]
- implicit class MemCompatibility extends AnyRef
- type Module = CompatibilityModule
- type Num[T <: Data] = chisel3.Num[T]
- type Pipe[T <: Data] = chisel3.util.Pipe[T]
- type Queue[T <: Data] = QueueCompatibility[T]
- sealed class QueueCompatibility[T <: Data] extends chisel3.util.Queue[T]
- type QueueIO[T <: Data] = chisel3.util.QueueIO[T]
- type RRArbiter[T <: Data] = chisel3.util.RRArbiter[T]
- type Record = chisel3.Record
- type Reset = chisel3.Reset
- type SInt = chisel3.SInt
-
trait
SIntFactory extends chisel3.SIntFactory
This contains literal constructor factory methods that are deprecated as of Chisel3.
- type SeqMem[T <: Data] = SyncReadMem[T]
- implicit class SeqMemCompatibility extends AnyRef
- type SwitchContext[T <: Bits] = chisel3.util.SwitchContext[T]
- type UInt = chisel3.UInt
-
trait
UIntFactory extends chisel3.UIntFactory
This contains literal constructor factory methods that are deprecated as of Chisel3.
- type ValidIO[+T <: Data] = Valid[T]
- type Vec[T <: Data] = chisel3.Vec[T]
- type VecLike[T <: Data] = chisel3.VecLike[T]
- implicit class VecLikeCompatibility[T <: Data] extends AnyRef
- type WhenContext = chisel3.WhenContext
- implicit class cloneTypeable[T <: Data] extends AnyRef
- implicit class fromBigIntToLiteral extends chisel3.fromBigIntToLiteral
- implicit class fromBitsable[T <: Data] extends AnyRef
- implicit class fromBooleanToLiteral extends chisel3.fromBooleanToLiteral
- implicit class fromIntToWidth extends chisel3.fromIntToWidth
- implicit class fromStringToLiteral extends chisel3.fromStringToLiteral
- implicit class fromtIntToLiteral extends fromIntToLiteral
- implicit class fromtLongToLiteral extends fromLongToLiteral
Value Members
- val BitPat: chisel3.util.BitPat.type
- val Cat: chisel3.util.Cat.type
- val Counter: chisel3.util.Counter.type
- val Decoupled: chisel3.util.Decoupled.type
- val DecoupledIO: chisel3.util.Decoupled.type
- val Fill: chisel3.util.Fill.type
- val FillInterleaved: chisel3.util.FillInterleaved.type
- val ImplicitConversions: chisel3.util.ImplicitConversions.type
- val Input: chisel3.Input.type
- val ListLookup: chisel3.util.ListLookup.type
- val Log2: chisel3.util.Log2.type
- val Lookup: chisel3.util.Lookup.type
- val Mem: chisel3.Mem.type
- val Module: chisel3.Module.type
- val Mux: chisel3.Mux.type
- val Mux1H: chisel3.util.Mux1H.type
- val MuxCase: chisel3.util.MuxCase.type
- val MuxLookup: chisel3.util.MuxLookup.type
- val OHToUInt: chisel3.util.OHToUInt.type
- val Output: chisel3.Output.type
- val Pipe: chisel3.util.Pipe.type
- val PopCount: chisel3.util.PopCount.type
- val PriorityEncoder: chisel3.util.PriorityEncoder.type
- val PriorityEncoderOH: chisel3.util.PriorityEncoderOH.type
- val PriorityMux: chisel3.util.PriorityMux.type
- val Queue: chisel3.util.Queue.type
- val RegEnable: chisel3.util.RegEnable.type
- val RegInit: chisel3.RegInit.type
- val RegNext: chisel3.RegNext.type
- val Reverse: chisel3.util.Reverse.type
- val SeqMem: SyncReadMem.type
- val ShiftRegister: chisel3.util.ShiftRegister.type
- val UIntToOH: chisel3.util.UIntToOH.type
- val Valid: chisel3.util.Valid.type
- val assert: chisel3.assert.type
- implicit val defaultCompileOptions: CompileOptionsClass
- val is: chisel3.util.is.type
- val isPow2: chisel3.util.isPow2.type
- val log2Ceil: chisel3.util.log2Ceil.type
- val log2Floor: chisel3.util.log2Floor.type
- val printf: chisel3.printf.type
- implicit def resetToBool(reset: Reset): Bool
- val stop: chisel3.stop.type
- val switch: chisel3.util.switch.type
- val unless: chisel3.util.unless.type
- val when: chisel3.when.type
- object Bits extends UIntFactory
- object Bool extends BoolFactory
- object Clock
- object Enum extends Enum
- object Flipped
- object INPUT extends Direction with Product with Serializable
-
object
LFSR16
LFSR16 generates a 16-bit linear feedback shift register, returning the register contents.
LFSR16 generates a 16-bit linear feedback shift register, returning the register contents. This is useful for generating a pseudo-random sequence.
The example below, taken from the unit tests, creates two 4-sided dice using
LFSR16
primitives:val bins = Reg(Vec(8, UInt(32.W))) // Create two 4 sided dice and roll them each cycle. // Use tap points on each LFSR so values are more independent val die0 = Cat(Seq.tabulate(2) { i => LFSR16()(i) }) val die1 = Cat(Seq.tabulate(2) { i => LFSR16()(i + 2) }) val rollValue = die0 +& die1 // Note +& is critical because sum will need an extra bit. bins(rollValue) := bins(rollValue) + 1.U
Example: - object NODIR extends Direction with Product with Serializable
- object OUTPUT extends Direction with Product with Serializable
- object Reg
- object SInt extends SIntFactory
- object UInt extends UIntFactory
- object Vec extends VecFactory
- object Wire extends WireFactory
- object chiselMain
-
object
experimental
Package for experimental features, which may have their API changed, be removed, etc.
Package for experimental features, which may have their API changed, be removed, etc.
Because its contents won't necessarily have the same level of stability and support as non-experimental, you must explicitly import this package to use its contents.
-
object
log2Down
Compute the log2 rounded down with min value of 1
-
object
log2Up
Compute the log2 rounded up with min value of 1
- object testers
-
object
throwException
- Annotations
- @throws( classOf[Exception] )
Deprecated Value Members
-
val
Driver: chisel3.Driver.type
- Annotations
- @deprecated
- Deprecated
(Since version 3.4) Please switch to chisel3.stage.ChiselStage
-
object
debug
- Annotations
- @deprecated
- Deprecated
(Since version chisel3) debug doesn't do anything in Chisel3 as no pruning happens in the frontend
This is the documentation for Chisel.
Package structure
The chisel3 package presents the public API of Chisel. It contains the concrete core types
UInt
,SInt
,Bool
,FixedPoint
,Clock
, andReg
, the abstract typesBits
,Aggregate
, andData
, and the aggregate typesBundle
andVec
.The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.
Utility objects and methods are found in the
util
package.The
testers
package defines the basic interface for chisel testers.