firrtl
package firrtl
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Package Members
- package analyses
- package annotations
- package antlr
- package backends
- package benchmark
- package checks
- package constraint
- package features
- package fuzzer
- package graph
- package ir
- package jqf
- package options
- package passes
- package proto
- package stage
The stage package provides an implementation of the FIRRTL compiler using the firrtl.options package.
The stage package provides an implementation of the FIRRTL compiler using the firrtl.options package. This primarily consists of:
- FirrtlStage, the internal and external (command line) interface to the FIRRTL compiler
- A number of Phases that support and compartmentalize the individual operations of FirrtlStage
- FirrtlOptions, a class representing options that are necessary to drive the FirrtlStage and its Phases
- FirrtlOptionsView, a utility that constructs an OptionsView of FirrtlOptions from an AnnotationSeq
- FirrtlCli, the command line options that the FirrtlStage supports
- FirrtlStageUtils containing miscellaneous utilities for stage
- package transforms
- package traversals
- package util
Type Members
- class AddDescriptionNodes extends Transform with DependencyAPIMigration
Wraps modules or statements with their respective described nodes.
Wraps modules or statements with their respective described nodes. Descriptions come from DescriptionAnnotation. Describing a module or any of its ports will turn it into a
DescribedMod
. Describing a Statement will turn it into a (private)DescribedStmt
.- Note
should only be used by VerilogEmitter, described nodes will break other transforms.
- class AnnotationSeq extends AnyRef
Container of all annotations for a Firrtl compiler
- case class Attribute(string: StringLit) extends FirrtlNode with Description with Product with Serializable
A Verilog-style attribute.
A Verilog-style attribute.
- string
the attribute
- case class AttributeAnnotation(target: Target, description: String) extends DescriptionAnnotation with Product with Serializable
An Verilog-style attribute.
An Verilog-style attribute.
- target
the object being given an attribute
- description
the attribute
- case class CDefMPort(info: Info, name: String, tpe: Type, mem: String, exps: Seq[Expression], direction: MPortDir) extends Statement with HasInfo with UseSerializer with Product with Serializable
- case class CDefMemory(info: Info, name: String, tpe: Type, size: BigInt, seq: Boolean, readUnderWrite: ir.ReadUnderWrite.Value = ReadUnderWrite.Undefined) extends Statement with HasInfo with UseSerializer with Product with Serializable
- class ChirrtlEmitter extends FirrtlEmitter
- case class CircuitState(circuit: Circuit, form: CircuitForm, annotations: AnnotationSeq, renames: Option[RenameMap]) extends Product with Serializable
Current State of the Circuit
Current State of the Circuit
- circuit
The current state of the Firrtl AST
- form
The current form of the circuit
- annotations
The current collection of Annotation
- renames
A map of Named things that have been renamed. Generally only a return value from Transforms
- trait ConnectEmissionOption extends EmissionOption
Emission customization options for connect
- case class CustomTransformException(cause: Throwable) extends Exception with Product with Serializable
Wraps exceptions from CustomTransforms so they can be reported appropriately
- trait DependencyAPIMigration extends AnyRef
This trait helps ease migration from old CircuitForm specification of dependencies to Dependency API specification of dependencies.
This trait helps ease migration from old CircuitForm specification of dependencies to Dependency API specification of dependencies. This trait implements deprecated, abstract Transform methods (
inputForm
andoutputForm
) for you and sets default values for dependencies:prerequisites
are emptyoptionalPrerequisites
are emptyoptionalPrerequisiteOf
are empty- all transforms are invalidated
For more information, see: https://bit.ly/2Voppre
- sealed trait Description extends FirrtlNode
Base trait for a description that gives some information about a
FirrtlNode
.Base trait for a description that gives some information about a
FirrtlNode
. Usually, we would like to emit these descriptions in some way. - sealed trait DescriptionAnnotation extends Annotation
A base trait for
Annotation
s that describe aFirrtlNode
.A base trait for
Annotation
s that describe aFirrtlNode
. Usually, we would like to emit these descriptions in some way. - case class DocString(string: StringLit) extends FirrtlNode with Description with Product with Serializable
A docstring description (a comment)
A docstring description (a comment)
- string
a comment
- case class DocStringAnnotation(target: Target, description: String) extends DescriptionAnnotation with Product with Serializable
A docstring description (a comment).
A docstring description (a comment).
- target
the object being described
- description
the docstring describing the object
- trait EmissionOption extends AnyRef
Base type for emission customization options NOTE: all the following traits must be mixed with SingleTargetAnnotation[T <: Named] in order to be taken into account in the Emitter
- case class EmitAllModulesAnnotation(emitter: Class[_ <: Emitter]) extends EmitAnnotation with Product with Serializable
- sealed trait EmitAnnotation extends NoTargetAnnotation
- case class EmitCircuitAnnotation(emitter: Class[_ <: Emitter]) extends EmitAnnotation with Product with Serializable
- trait EmittedAnnotation[T <: EmittedComponent] extends NoTargetAnnotation with CustomFileEmission
Traits for Annotations containing emitted components
- sealed abstract class EmittedCircuit extends EmittedComponent
- sealed trait EmittedCircuitAnnotation[T <: EmittedCircuit] extends EmittedAnnotation[T]
- sealed abstract class EmittedComponent extends AnyRef
- final case class EmittedFirrtlCircuit(name: String, value: String, outputSuffix: String) extends EmittedCircuit with Product with Serializable
- case class EmittedFirrtlCircuitAnnotation(value: EmittedFirrtlCircuit) extends EmittedCircuitAnnotation[EmittedFirrtlCircuit] with Product with Serializable
- final case class EmittedFirrtlModule(name: String, value: String, outputSuffix: String) extends EmittedModule with Product with Serializable
- case class EmittedFirrtlModuleAnnotation(value: EmittedFirrtlModule) extends EmittedModuleAnnotation[EmittedFirrtlModule] with Product with Serializable
- sealed abstract class EmittedModule extends EmittedComponent
- sealed trait EmittedModuleAnnotation[T <: EmittedModule] extends EmittedAnnotation[T]
- final case class EmittedVerilogCircuit(name: String, value: String, outputSuffix: String) extends EmittedCircuit with Product with Serializable
- case class EmittedVerilogCircuitAnnotation(value: EmittedVerilogCircuit) extends EmittedCircuitAnnotation[EmittedVerilogCircuit] with Product with Serializable
- final case class EmittedVerilogModule(name: String, value: String, outputSuffix: String) extends EmittedModule with Product with Serializable
- case class EmittedVerilogModuleAnnotation(value: EmittedVerilogModule) extends EmittedModuleAnnotation[EmittedVerilogModule] with Product with Serializable
- trait Emitter extends Transform
Defines old API for Emission.
Defines old API for Emission. Deprecated
- case class EmitterException(message: String) extends PassException with Product with Serializable
- sealed abstract class FirrtlEmitter extends Transform with Emitter
- final class FirrtlProtos extends AnyRef
- class FirrtlUserException extends RuntimeException with NoStackTrace
Exception indicating user error
Exception indicating user error
These exceptions indicate a problem due to bad input and thus do not include a stack trace. This can be extended by custom transform writers.
- trait Flow extends AnyRef
- class HighFirrtlEmitter extends FirrtlEmitter
- case class InvalidEscapeCharException(message: String) extends ParserException with Product with Serializable
- case class InvalidStringLitException(message: String) extends ParserException with Product with Serializable
- trait Kind extends AnyRef
- abstract class LexerHelper extends AnyRef
- class LowFirrtlEmitter extends FirrtlEmitter
- abstract class MPortDir extends FirrtlNode
- class MemoizedHash[T] extends AnyRef
- case class MemoryArrayInit(values: Seq[BigInt]) extends MemoryInitValue with Product with Serializable
- trait MemoryEmissionOption extends EmissionOption
Emission customization options for memories
- case class MemoryFileInlineInit(filename: String, hexOrBinary: FileType) extends MemoryInitValue with Product with Serializable
- sealed trait MemoryInitValue extends AnyRef
- case class MemoryScalarInit(value: BigInt) extends MemoryInitValue with Product with Serializable
- class MiddleFirrtlEmitter extends FirrtlEmitter
- class MinimumVerilogEmitter extends VerilogEmitter with Emitter
- class ModuleGraph extends AnyRef
Maintains a one to many graph of each modules instantiated child module.
Maintains a one to many graph of each modules instantiated child module. This graph can be searched for a path from a child module back to one of it's parents. If one is found a recursive loop has happened The graph is a map between the name of a node to set of names of that nodes children
- class Namespace extends AnyRef
- trait NodeEmissionOption extends EmissionOption
Emission customization options for nodes
- final case class OneFilePerModule(targetDir: String) extends OutputConfig with Product with Serializable
- sealed abstract class OutputConfig extends AnyRef
Firrtl output configuration specified by FirrtlExecutionOptions
Firrtl output configuration specified by FirrtlExecutionOptions
Derived from the fields of the execution options
- case class ParameterNotSpecifiedException(message: String) extends ParserException with Product with Serializable
- case class ParameterRedefinedException(message: String) extends ParserException with Product with Serializable
- class ParserException extends FirrtlUserException
- trait PortEmissionOption extends EmissionOption
Emission customization options for IO ports
- trait RegisterEmissionOption extends EmissionOption
Emission customization options for registers
- final class RenameMap extends AnyRef
Map old names to new names
Map old names to new names
Transforms that modify names should return a RenameMap with the CircuitState These are mutable datastructures for convenience
- trait ResolvedAnnotationPaths extends AnyRef
Extend for transforms that require resolved targets in their annotations Ensures all targets in annotations of a class in annotationClasses are resolved before the execute method
- abstract class SeqTransform extends Transform with SeqTransformBased
For transformations that are simply a sequence of transforms
- trait SeqTransformBased extends AnyRef
- final case class SingleFile(targetFile: String) extends OutputConfig with Product with Serializable
- case class SyntaxErrorsException(message: String) extends ParserException with Product with Serializable
- class SystemVerilogEmitter extends VerilogEmitter
- trait Transform extends TransformLike[CircuitState] with DependencyAPI[Transform]
The basic unit of operating on a Firrtl AST
- case class VRandom(width: BigInt) extends Expression with Product with Serializable
- class VerilogEmitter extends SeqTransform with Emitter
- class Visitor extends AbstractParseTreeVisitor[FirrtlNode] with ParseTreeVisitor[FirrtlNode]
- type WDefInstance = DefInstance
- case class WDefInstanceConnector(info: Info, name: String, module: String, tpe: Type, portCons: Seq[(Expression, Expression)]) extends Statement with IsDeclaration with UseSerializer with Product with Serializable
- type WRef = Reference
- type WSubAccess = SubAccess
- type WSubField = SubField
- type WSubIndex = SubIndex
- trait WireEmissionOption extends EmissionOption
Emission customization options for wires
- class WrappedExpression extends AnyRef
- case class WrappedInt(value: BigInt) extends Product with Serializable
- class WrappedType extends AnyRef
- class WrappedWidth extends AnyRef
Deprecated Type Members
- class ChirrtlToHighFirrtl extends CoreTransform
This transforms "CHIRRTL", the chisel3 IR, to "Firrtl".
This transforms "CHIRRTL", the chisel3 IR, to "Firrtl". Note the resulting circuit has only IR nodes, not WIR.
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use 'new TransformManager(Forms.MinimalHighForm, Forms.ChirrtlForm)'. This will be removed in 1.4.
- sealed abstract class CircuitForm extends Ordered[CircuitForm]
Current form of the Firrtl Circuit
Current form of the Firrtl Circuit
Form is a measure of addition restrictions on the legality of a Firrtl circuit. There is a notion of "highness" and "lowness" implemented in the compiler by extending scala.math.Ordered. "Lower" forms add additional restrictions compared to "higher" forms. This means that "higher" forms are strictly supersets of the "lower" forms. Thus, that any transform that operates on HighForm can also operate on MidForm or LowForm
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Mix-in the DependencyAPIMigration trait into your Transform and specify its Dependency API dependencies. See: https://bit.ly/2Voppre
- case class CommonOptions(topName: String = "", targetDirName: String = ".", globalLogLevel: logger.LogLevel.Value = LogLevel.None, logToFile: Boolean = false, logClassNames: Boolean = false, classLogLevels: Map[String, logger.LogLevel.Value] = Map.empty, programArgs: Seq[String] = Seq.empty) extends ComposableOptions with Product with Serializable
Most of the chisel toolchain components require a topName which defines a circuit or a device under test.
Most of the chisel toolchain components require a topName which defines a circuit or a device under test. Much of the work that is done takes place in a directory. It would be simplest to require topName to be defined but in practice it is preferred to defer this. For example, in chisel, by deferring this it is possible for the execute there to first elaborate the circuit and then set the topName from that if it has not already been set.
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use a FirrtlOptionsView, LoggerOptionsView, or construct your own view of an AnnotationSeq
- trait Compiler extends Transform with DependencyAPIMigration
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Migrate to firrtl.stage.transforms.Compiler. This will be removed in 1.4.
- trait ComposableOptions extends AnyRef
Use this trait to define an options class that can add its private command line options to a externally declared parser.
Use this trait to define an options class that can add its private command line options to a externally declared parser. NOTE In all derived trait/classes, if you intend on maintaining backwards compatibility, be sure to add new options at the end of the current ones and don't remove any existing ones.
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use firrtl.options.HasScoptOptions and/or library/transform registration
- sealed abstract class CoreTransform extends SeqTransform
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use a TransformManager or some other Stage/Phase class. Will be removed in 1.4.
- class ExecutionOptionsManager extends HasParser with HasCommonOptions
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use new FirrtlStage infrastructure
- class FIRRTLException extends RuntimeException
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) External users should use either FirrtlUserException or their own hierarchy
- case class FirrtlExecutionFailure(message: String) extends FirrtlExecutionResult with Product with Serializable
The firrtl compilation failed.
The firrtl compilation failed.
- message
Some kind of hint as to what went wrong.
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use FirrtlStage and examine the output AnnotationSeq directly
- case class FirrtlExecutionOptions(inputFileNameOverride: String = "", outputFileNameOverride: String = "", compilerName: String = "verilog", infoModeName: String = "append", inferRW: Seq[String] = Seq.empty, firrtlSource: Option[String] = None, customTransforms: Seq[Transform] = List.empty, annotations: List[Annotation] = List.empty, annotationFileNameOverride: String = "", outputAnnotationFileName: String = "", emitOneFilePerModule: Boolean = false, dontCheckCombLoops: Boolean = false, noDCE: Boolean = false, annotationFileNames: List[String] = List.empty, firrtlCircuit: Option[Circuit] = None) extends ComposableOptions with Product with Serializable
The options that firrtl supports in callable component sense
The options that firrtl supports in callable component sense
- inputFileNameOverride
default is targetDir/topName.fir
- outputFileNameOverride
default is targetDir/topName.v the .v is based on the compilerName parameter
- compilerName
which compiler to use
- annotations
annotations to pass to compiler
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use a FirrtlOptionsView or construct your own view of an AnnotationSeq
- sealed trait FirrtlExecutionResult extends AnyRef
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use FirrtlStage and examine the output AnnotationSeq directly
- class FirrtlExecutionSuccess extends FirrtlExecutionResult
Indicates a successful execution of the firrtl compiler, returning the compiled result and the type of compile
Indicates a successful execution of the firrtl compiler, returning the compiled result and the type of compile
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use FirrtlStage and examine the output AnnotationSeq directly
- trait HasCommonOptions extends AnyRef
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Specify command line arguments in an Annotation mixing in HasScoptOptions
- trait HasFirrtlOptions extends AnyRef
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Specify command line arguments in an Annotation mixing in HasScoptOptions
- abstract class HasParser extends AnyRef
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use firrtl.options.{ExecutionOptionsManager, TerminateOnExit, DuplicateHandling}
- class HighFirrtlCompiler extends Compiler
Emits input circuit Will replace Chirrtl constructs with Firrtl
Emits input circuit Will replace Chirrtl constructs with Firrtl
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use stage.{FirrtlStage, FirrtlMain} stage.transforms.Compiler(Seq(Dependency[HighFirrtlEmitter]))
- class HighFirrtlToMiddleFirrtl extends CoreTransform
Expands aggregate connects, removes dynamic accesses, and when statements.
Expands aggregate connects, removes dynamic accesses, and when statements. Checks for uninitialized values. Must accept a well-formed graph. Operates on working IR nodes.
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use 'new TransformManager(Forms.MidForm, Forms.Deduped)'. This will be removed in 1.4.
- class IRToWorkingIR extends CoreTransform
Converts from the bare intermediate representation (ir.scala) to a working representation (WIR.scala)
Converts from the bare intermediate representation (ir.scala) to a working representation (WIR.scala)
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use 'new TransformManager(Forms.WorkingIR, Forms.MinimalHighForm)'. This will be removed in 1.4.
- class LowFirrtlCompiler extends Compiler
Emits lowered input circuit
Emits lowered input circuit
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use stage.{FirrtlStage, FirrtlMain} stage.transforms.Compiler(Dependency[LowFirrtlEmitter])
- class LowFirrtlOptimization extends CoreTransform
Runs a series of optimization passes on LowFirrtl
Runs a series of optimization passes on LowFirrtl
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use 'new TransformManager(Forms.LowFormOptimized, Forms.LowForm)'. This will be removed in 1.4.
- Note
This is currently required for correct Verilog emission TODO Fix the above note
- class MiddleFirrtlCompiler extends Compiler
Emits middle Firrtl input circuit
Emits middle Firrtl input circuit
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use stage.{FirrtlStage, FirrtlMain} stage.transforms.Compiler(Dependency[MiddleFirrtlEmitter])
- class MiddleFirrtlToLowFirrtl extends CoreTransform
Expands all aggregate types into many ground-typed components.
Expands all aggregate types into many ground-typed components. Must accept a well-formed graph of only middle Firrtl features. Operates on working IR nodes.
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use 'new TransformManager(Forms.LowForm, Forms.MidForm)'. This will be removed in 1.4.
- class MinimumLowFirrtlOptimization extends CoreTransform
Runs runs only the optimization passes needed for Verilog emission
Runs runs only the optimization passes needed for Verilog emission
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use 'new TransformManager(Forms.LowFormMinimumOptimized, Forms.LowForm)'. This will be removed in 1.4.
- class MinimumVerilogCompiler extends Compiler
Emits Verilog without optimizations
Emits Verilog without optimizations
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use stage.{FirrtlStage, FirrtlMain} stage.transforms.Compiler(Dependency[MinimumVerilogEmitter])
- class NoneCompiler extends Compiler
Emits input circuit with no changes
Emits input circuit with no changes
Primarily useful for changing between .fir and .pb serialized formats
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use stage.{FirrtlStage, FirrtlMain} or stage.transforms.Compiler(Seq(Dependency[ChirrtlEmitter]))
- class ResolveAndCheck extends CoreTransform
Resolves types, kinds, and flows, and checks the circuit legality.
Resolves types, kinds, and flows, and checks the circuit legality. Operates on working IR nodes and high Firrtl.
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use 'new TransformManager(Forms.Resolved, Forms.WorkingIR)'. This will be removed in 1.4.
- class SystemVerilogCompiler extends VerilogCompiler
Currently just an alias for the VerilogCompiler
Currently just an alias for the VerilogCompiler
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use stage.{FirrtlStage, FirrtlMain} stage.transforms.Compiler(Dependency[SystemVerilogEmitter])
- type TargetDirAnnotation = firrtl.options.TargetDirAnnotation
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use firrtl.stage.TargetDirAnnotation
- class VerilogCompiler extends Compiler
Emits Verilog
Emits Verilog
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Use stage.{FirrtlStage, FirrtlMain} stage.transforms.Compiler(Dependency[VerilogEmitter])
Value Members
- implicit def annoSeqToSeq(as: AnnotationSeq): Seq[Annotation]
- implicit def seqToAnnoSeq(xs: Seq[Annotation]): AnnotationSeq
- case object Addw extends PrimOp with Product with Serializable
- object AnnotationSeq
- case object BuildInfo extends Product with Serializable
This object was generated by sbt-buildinfo.
- object CircuitState extends Serializable
- case object ConnectEmissionOptionDefault extends ConnectEmissionOption with Product with Serializable
default Emitter behavior for connect
- case object Dshlw extends PrimOp with Product with Serializable
- case object DuplexFlow extends Flow with Product with Serializable
- object EmitAllModulesAnnotation extends HasShellOptions with Serializable
- object EmitCircuitAnnotation extends HasShellOptions with Serializable
- case object EmptyExpression extends Expression with UseSerializer with Product with Serializable
- case object ExpKind extends Kind with Product with Serializable
- object FileUtils
- object Implicits
- case object InstanceKind extends Kind with Product with Serializable
- case object MInfer extends MPortDir with Product with Serializable
- case object MRead extends MPortDir with Product with Serializable
- case object MReadWrite extends MPortDir with Product with Serializable
- case object MWrite extends MPortDir with Product with Serializable
- object Mappers
- case object MemKind extends Kind with Product with Serializable
- object MemoizedHash
- case object MemoryEmissionOptionDefault extends MemoryEmissionOption with Product with Serializable
default Emitter behavior for memories
- case object MemoryRandomInit extends MemoryInitValue with Product with Serializable
- object Namespace
- case object NodeEmissionOptionDefault extends NodeEmissionOption with Product with Serializable
default Emitter behavior for nodes
- case object NodeKind extends Kind with Product with Serializable
- object Parser extends LazyLogging
- case object PoisonKind extends Kind with Product with Serializable
- case object PortEmissionOptionDefault extends PortEmissionOption with Product with Serializable
default Emitter behavior for IO ports
- case object PortKind extends Kind with Product with Serializable
- object PrimOps extends LazyLogging
Definitions and Utility functions for ir.PrimOps
- case object RegKind extends Kind with Product with Serializable
- case object RegisterEmissionOptionDefault extends RegisterEmissionOption with Product with Serializable
default Emitter behavior for registers
- object RenameMap
- case object SinkFlow extends Flow with Product with Serializable
- case object SourceFlow extends Flow with Product with Serializable
- case object Subw extends PrimOp with Product with Serializable
- case object UnknownFlow extends Flow with Product with Serializable
- case object UnknownKind extends Kind with Product with Serializable
- object Utils extends LazyLogging
- object VerilogEmitter
- object WDefInstance
- case object WInvalid extends Expression with UseSerializer with Product with Serializable
- object WRef
- object WSubAccess
- object WSubField
- object WSubIndex
- case object WVoid extends Expression with UseSerializer with Product with Serializable
- case object WireEmissionOptionDefault extends WireEmissionOption with Product with Serializable
default Emitter behavior for wires
- case object WireKind extends Kind with Product with Serializable
- object WrappedExpression
- object WrappedType
- object WrappedWidth
- object bitWidth
- object castRhs
- object connectFields
- object flattenType
- object fromBits
- object getWidth
- object seqCat
- object toBits
Given an expression, return an expression consisting of all sub-expressions concatenated (or flattened).
Deprecated Value Members
- val TargetDirAnnotation: firrtl.options.TargetDirAnnotation.type
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use firrtl.stage.TargetDirAnnotation
- case object ChirrtlForm extends CircuitForm with Product with Serializable
Chirrtl Form
Chirrtl Form
The form of the circuit emitted by Chisel. Not a true Firrtl form. Includes cmem, smem, and mport IR nodes which enable declaring memories separately form their ports. A "Higher" form than HighForm
See CDefMemory and CDefMPort
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Mix-in the DependencyAPIMigration trait into your Transform and specify its Dependency API dependencies. See: https://bit.ly/2Voppre
- object CompilerUtils extends LazyLogging
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) This will be removed in 1.4
- object Driver
The driver provides methods to access the firrtl compiler.
The driver provides methods to access the firrtl compiler. Invoke the compiler with either a FirrtlExecutionOption
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use firrtl.stage.FirrtlStage
val optionsManager = new ExecutionOptionsManager("firrtl") optionsManager.register( FirrtlExecutionOptionsKey -> new FirrtlExecutionOptions(topName = "Dummy", compilerName = "verilog")) firrtl.Driver.execute(optionsManager)
or a series of command line arguments
, firrtl.Driver.execute(Array("--top-name Dummy --compiler verilog".split(" +"))
each approach has its own endearing aspects
- See also
firrtlTests/DriverSpec.scala in the test directory for a lot more examples
CompilerUtils.mergeTransforms to see how customTransformations are inserted
Examples: - object FIRRTLException extends Serializable
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) External users should use either FirrtlUserException or their own hierarchy
- object FirrtlExecutionSuccess
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.2) Use FirrtlStage and examine the output AnnotationSeq directly
- case object HighForm extends CircuitForm with Product with Serializable
High Form
High Form
As detailed in the Firrtl specification https://github.com/ucb-bar/firrtl/blob/master/spec/spec.pdf
Also see firrtl.ir
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Mix-in the DependencyAPIMigration trait into your Transform and specify its Dependency API dependencies. See: https://bit.ly/2Voppre
- case object LowForm extends CircuitForm with Product with Serializable
Low Form
Low Form
The "lowest" form. In addition to the restrictions in MidForm:
- All aggregate types (vector/bundle) must have been removed
- All implicit truncations must be made explicit
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Mix-in the DependencyAPIMigration trait into your Transform and specify its Dependency API dependencies. See: https://bit.ly/2Voppre
- case object MidForm extends CircuitForm with Product with Serializable
Middle Form
Middle Form
A "lower" form than HighForm with the following restrictions:
- All widths must be explicit
- All whens must be removed
- There can only be a single connection to any element
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Mix-in the DependencyAPIMigration trait into your Transform and specify its Dependency API dependencies. See: https://bit.ly/2Voppre
- case object UnknownForm extends CircuitForm with Product with Serializable
Unknown Form
Unknown Form
Often passes may modify a circuit (e.g. InferTypes), but return a circuit in the same form it was given.
For this use case, use UnknownForm. It cannot be compared against other forms.
TODO(azidar): Replace with PreviousForm, which more explicitly encodes this requirement.
- Annotations
- @deprecated
- Deprecated
(Since version FIRRTL 1.3) Mix-in the DependencyAPIMigration trait into your Transform and specify its Dependency API dependencies. See: https://bit.ly/2Voppre
This is the documentation for Firrtl.