Value Members

1.  final def !=(arg0: Any): Boolean

   Definition Classes

   AnyRef → Any

2.  final def ##(): Int

   Definition Classes

   AnyRef → Any

3.  final def ==(arg0: Any): Boolean

   Definition Classes

   AnyRef → Any

4.  val address: AddressSet

   Definition Classes

   TLRegisterRouterBase

5.  final def asInstanceOf[T0]: T0

   Definition Classes

   Any

6.  val base: BigInt

   Definition Classes

   TLRegisterRouter

7.  val baseAddr: BigInt
8.  val beatBytes: Int

   Definition Classes

   TLRegisterRouter

9.  var children: List[LazyModule]

   Attributes

   protected[freechips.rocketchip.diplomacy]

   Definition Classes

   LazyModule

10.  lazy val className: String

    Definition Classes

    LazyModule

11.  def clone(): AnyRef

    Attributes

    protected[java.lang]

    Definition Classes

    AnyRef

    Annotations

    @native() @throws( ... )

12.  val concurrency: Int

    Definition Classes

    TLRegisterRouter

13.  lazy val desiredName: String

    Definition Classes

    LazyModule

14.  val devcompat: Seq[String]

    Definition Classes

    TLRegisterRouter

15.  val device: SimpleDevice

    Definition Classes

    TLRegisterRouterBase

16.  val devname: String

    Definition Classes

    TLRegisterRouter

17.  final def eq(arg0: AnyRef): Boolean

    Definition Classes

    AnyRef

18.  def equals(arg0: Any): Boolean

    Definition Classes

    AnyRef → Any

19.  val executable: Boolean

    Definition Classes

    TLRegisterRouter

20.  def extraResources(resources: ResourceBindings): Map[String, Seq[ResourceValue]]

    Definition Classes

    TLRegisterRouterBase

21.  def finalize(): Unit

    Attributes

    protected[java.lang]

    Definition Classes

    AnyRef

    Annotations

    @throws( classOf[java.lang.Throwable] )

22.  def getChildren: List[LazyModule]

    Definition Classes

    LazyModule

23.  final def getClass(): Class[_]

    Definition Classes

    AnyRef → Any

    Annotations

    @native()

24.  lazy val graphML: String

    Definition Classes

    LazyModule

25.  def hashCode(): Int

    Definition Classes

    AnyRef → Any

    Annotations

    @native()

26.  var inModuleBody: List[() ⇒ Unit]

    Attributes

    protected[freechips.rocketchip.diplomacy]

    Definition Classes

    LazyModule

27.  var info: SourceInfo

    Attributes

    protected[freechips.rocketchip.diplomacy]

    Definition Classes

    LazyModule

28.  lazy val instanceName: String

    Definition Classes

    LazyModule

29.  val interrupts: Int

    Definition Classes

    TLRegisterRouter

30.  val intnode: IntSourceNode

    Definition Classes

    TLRegisterRouterBase

31.  final def isInstanceOf[T0]: Boolean

    Definition Classes

    Any

32.  val len: Int

    Maximum length of the vector register

    Maximum length of the vector register

    Definition Classes

    TLDspRegister → DspRegister

33.  def line: String

    Definition Classes

    LazyModule

34.  val mapMem: Boolean

    Condition to include the contents of the register in the memory map

    Condition to include the contents of the register in the memory map

    Definition Classes

    TLDspRegister → DspRegister

35.  val mem: Some[TLRegisterNode]

    Diplmatic node for memory interface Some blocks might not need memory mapping, so this is an Option[]

    Diplmatic node for memory interface Some blocks might not need memory mapping, so this is an Option[]

    Definition Classes

    TLDspRegister → DspBlock

36.  lazy val module: TLRegModule[Int, TLRegBundle[Int]] with DspRegisterImp[TLClientPortParameters, TLManagerPortParameters, TLEdgeOut, TLEdgeIn, TLBundle]

    Definition Classes

    TLRegisterRouter → LazyModule

37.  lazy val moduleName: String

    Definition Classes

    LazyModule

38.  def name: String

    Definition Classes

    LazyModule

39.  final def ne(arg0: AnyRef): Boolean

    Definition Classes

    AnyRef

40.  val node: TLRegisterNode

    Definition Classes

    TLRegisterRouterBase

41.  def nodeIterator(iterfunc: (LazyModule) ⇒ Unit): Unit

    Definition Classes

    LazyModule

42.  var nodes: List[BaseNode]

    Attributes

    protected[freechips.rocketchip.diplomacy]

    Definition Classes

    LazyModule

43.  final def notify(): Unit

    Definition Classes

    AnyRef

    Annotations

    @native()

44.  final def notifyAll(): Unit

    Definition Classes

    AnyRef

    Annotations

    @native()

45.  def omitGraphML: Boolean

    Definition Classes

    LazyModule

46.  implicit val p: Parameters

    Definition Classes

    LazyModule

47.  val parent: Option[LazyModule]

    Attributes

    protected[freechips.rocketchip.diplomacy]

    Definition Classes

    LazyModule

48.  def parents: Seq[LazyModule]

    Definition Classes

    LazyModule

49.  lazy val pathName: String

    Definition Classes

    LazyModule

50.  val size: BigInt

    Definition Classes

    TLRegisterRouter

51.  val streamNode: AXI4StreamIdentityNode

    Diplomatic node for AXI4-Stream interfaces

    Diplomatic node for AXI4-Stream interfaces

    Definition Classes

    DspRegister → DspBlock

52.  def suggestName(x: Option[String]): TLDspRegister.this.type

    Definition Classes

    LazyModule

53.  def suggestName(x: String): TLDspRegister.this.type

    Definition Classes

    LazyModule

54.  lazy val suggestedName: String

    Definition Classes

    LazyModule

55.  final def synchronized[T0](arg0: ⇒ T0): T0

    Definition Classes

    AnyRef

56.  def toString(): String

    Definition Classes

    AnyRef → Any

57.  val undefZero: Boolean

    Definition Classes

    TLRegisterRouter

58.  final def wait(): Unit

    Definition Classes

    AnyRef

    Annotations

    @throws( ... )

59.  final def wait(arg0: Long, arg1: Int): Unit

    Definition Classes

    AnyRef

    Annotations

    @throws( ... )

60.  final def wait(arg0: Long): Unit

    Definition Classes

    AnyRef

    Annotations

    @native() @throws( ... )