Class

fringe

Fringe

Related Doc: package fringe

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class Fringe extends Module

Top module for FPGA shell

Linear Supertypes
LegacyModule, ImplicitModule, UserModule, BaseModule, HasId, InstanceId, AnyRef, Any
Ordering
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Inherited
  1. Fringe
  2. LegacyModule
  3. ImplicitModule
  4. UserModule
  5. BaseModule
  6. HasId
  7. InstanceId
  8. AnyRef
  9. Any
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Visibility
  1. Public
  2. All

Instance Constructors

  1. new Fringe(blockingDRAMIssue: Boolean, axiParams: AXI4BundleParameters)

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    blockingDRAMIssue

    TODO: What is this?

    axiParams

    TODO: What is this?

Type Members

  1. class StatusReg extends Bundle

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Value Members

  1. final def !=(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  2. final def ##(): Int

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    Definition Classes
    AnyRef → Any

  3. final def ==(arg0: Any): Boolean

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    Definition Classes
    AnyRef → Any

  4. def IO[T <: Data](iodef: T): iodef.type

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    Attributes
    protected
    Definition Classes
    BaseModule

  5. def _autoWrapPorts(): Unit

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    Definition Classes
    BaseModule

  6. var _closed: Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule

  7. def _ioPortBound(): Boolean

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    Attributes
    protected
    Definition Classes
    LegacyModule

  8. val alloc: Bool

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  9. def annotate(annotation: ChiselAnnotation): Unit

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    Attributes
    protected
    Definition Classes
    BaseModule

  10. final def asInstanceOf[T0]: T0

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    Definition Classes
    Any

  11. val assignment: List[List[Int]]

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  12. val axiLiteParams: AXI4BundleParameters

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  13. val bug239_hack: Boolean

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  14. val clock: Clock

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    Definition Classes
    ImplicitModule

  15. def clone(): AnyRef

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  16. val command: UInt

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  17. val commandReg: Int

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  18. val compileOptions: CompileOptions

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    Definition Classes
    UserModule

  19. val curStatus: StatusReg

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  20. val dealloc: Bool

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  21. val debugChannelID: Int

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  22. val depulser: Depulser

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  23. def desiredName: String

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    Definition Classes
    BaseModule

  24. val dramArbs: List[DRAMArbiter]

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  25. final def eq(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  26. def equals(that: Any): Boolean

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    Definition Classes
    HasId → AnyRef → Any

  27. def finalize(): Unit

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    Attributes
    protected[java.lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )

  28. final def getClass(): Class[_]

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    Definition Classes
    AnyRef → Any

  29. def getCommands: Seq[Command]

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    Attributes
    protected
    Definition Classes
    UserModule

  30. def getIds: Seq[HasId]

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    Attributes
    protected
    Definition Classes
    BaseModule

  31. def getModulePorts: Seq[Data]

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    Attributes
    protected
    Definition Classes
    BaseModule

  32. lazy val getPorts: Seq[Port]

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    Definition Classes
    UserModule

  33. def hashCode(): Int

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    Definition Classes
    HasId → AnyRef → Any

  34. val heap: DRAMHeap

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  35. val hostHeapReq: Valid[HeapReq]

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  36. val hostHeapResp: Valid[HeapResp]

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  37. def instanceName: String

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    Definition Classes
    BaseModule → HasId → InstanceId

  38. val io: Bundle { ... /* 19 definitions in type refinement */ }

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    Definition Classes
    Fringe → LegacyModule

  39. final def isInstanceOf[T0]: Boolean

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    Definition Classes
    Any

  40. val localEnable: Bool

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  41. val localReset: Bool

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  42. final val name: String

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    Definition Classes
    BaseModule

  43. def nameIds(rootClass: Class[_]): HashMap[HasId, String]

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    Attributes
    protected
    Definition Classes
    LegacyModule → BaseModule

  44. final def ne(arg0: AnyRef): Boolean

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    Definition Classes
    AnyRef

  45. final def notify(): Unit

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    Definition Classes
    AnyRef

  46. final def notifyAll(): Unit

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    Definition Classes
    AnyRef

  47. val numDebugs: Int

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  48. val numRegs: Int

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  49. var override_clock: Option[Clock]

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    Attributes
    protected
    Definition Classes
    LegacyModule

  50. var override_reset: Option[Bool]

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    Attributes
    protected
    Definition Classes
    LegacyModule

  51. def parentModName: String

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    Definition Classes
    HasId → InstanceId

  52. def parentPathName: String

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    Definition Classes
    HasId → InstanceId

  53. def pathName: String

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    Definition Classes
    HasId → InstanceId

  54. def portsContains(elem: Data): Boolean

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    Attributes
    protected
    Definition Classes
    BaseModule

  55. def portsSize: Int

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    Attributes
    protected
    Definition Classes
    BaseModule

  56. val regWidth: Int

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  57. val regs: RegFile

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  58. val reset: Reset

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    Definition Classes
    ImplicitModule

  59. val status: Valid[StatusReg]

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  60. val statusReg: Int

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  61. def suggestName(name: ⇒ String): Fringe.this.type

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    Definition Classes
    HasId

  62. final def synchronized[T0](arg0: ⇒ T0): T0

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    Definition Classes
    AnyRef

  63. val timeoutCtr: FringeCounter

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  64. val timeoutCycles: Long

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  65. def toString(): String

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    Definition Classes
    AnyRef → Any

  66. final def wait(): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  67. final def wait(arg0: Long, arg1: Int): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

  68. final def wait(arg0: Long): Unit

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    Definition Classes
    AnyRef
    Annotations
    @throws( ... )

Inherited from LegacyModule

Inherited from ImplicitModule

Inherited from UserModule

Inherited from BaseModule

Inherited from HasId

Inherited from InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped