Packages

c

spinal.core.internals

ComponentEmitterVerilog

class ComponentEmitterVerilog extends ComponentEmitter

Linear Supertypes
ComponentEmitter, AnyRef, Any
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Inherited
  1. ComponentEmitterVerilog
  2. ComponentEmitter
  3. AnyRef
  4. Any
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Visibility
  1. Public
  2. Protected

Instance Constructors

  1. new ComponentEmitterVerilog(c: Component, systemVerilog: Boolean, verilogBase: VerilogBase, algoIdIncrementalBase: Int, mergeAsyncProcess: Boolean, asyncResetCombSensitivity: Boolean, anonymSignalPrefix: String, nativeRom: Boolean, nativeRomFilePrefix: String, emitedComponentRef: ConcurrentHashMap[Component, Component], emitedRtlSourcesPath: LinkedHashSet[String], pc: PhaseContext, spinalConfig: SpinalConfig, romCache: HashMap[String, String])

Type Members

  1. class AsyncProcess extends AnyRef
    Definition Classes
    ComponentEmitter
  2. class SyncGroup extends AnyRef
    Definition Classes
    ComponentEmitter

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##: Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. val _referenceSet: LinkedHashSet[String]
  5. var _referenceSetEnabled: Boolean
  6. def accessBitVectorFixed(e: BitVectorRangedAccessFixed): String
  7. def accessBitVectorFloating(e: BitVectorRangedAccessFloating): String
  8. def accessBoolFixed(e: BitVectorBitAccessFixed): String
  9. def accessBoolFloating(e: BitVectorBitAccessFloating): String
  10. val algoIdIncrementalBase: Int
    Definition Classes
    ComponentEmitterVerilog → ComponentEmitter
  11. var algoIdIncrementalOffset: Int
    Definition Classes
    ComponentEmitter
  12. def allocateAlgoIncrementale(): Int
    Definition Classes
    ComponentEmitter
  13. val analogs: ArrayBuffer[BaseType]
    Definition Classes
    ComponentEmitter
  14. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  15. def boolLiteralImpl(e: BoolLiteral): String
  16. val c: Component
  17. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.CloneNotSupportedException]) @native() @HotSpotIntrinsicCandidate()
  18. def commentTagsToString(host: SpinalTagReady, comment: String): String
    Definition Classes
    ComponentEmitter
  19. def component: Component
    Definition Classes
    ComponentEmitterVerilog → ComponentEmitter
  20. def cutLongExpressions(): Unit
    Definition Classes
    ComponentEmitter
  21. val declarations: StringBuilder
  22. val definitionAttributes: StringBuilder
  23. def dispatchExpression(e: Expression): String
  24. def elaborate(): Unit
    Definition Classes
    ComponentEmitter
  25. def emitAnalogs(): Unit
  26. def emitArchitecture(): Unit
  27. def emitAssignedExpression(that: Expression): String
  28. def emitAsynchronous(process: AsyncProcess): Unit
  29. def emitAsynchronousAsAsign(process: AsyncProcess): Boolean
  30. def emitBaseTypeSignal(baseType: BaseType, name: String): String
  31. def emitBaseTypeWrap(baseType: BaseType, name: String): String
  32. def emitBitVectorLiteral(e: BitVectorLiteral): String
  33. def emitClockedProcess(emitRegsLogic: (String, StringBuilder) => Unit, emitRegsInitialValue: (String, StringBuilder) => Unit, b: StringBuilder, clockDomain: ClockDomain, withReset: Boolean): Unit
  34. def emitEntity(): Unit
  35. def emitEnumDebugLogic(): Unit
  36. def emitEnumLiteralWrap(e: EnumLiteral[_ <: SpinalEnum]): String
  37. def emitEnumParams(): Unit
  38. def emitEnumPoison(e: EnumPoison): String
  39. def emitExpression(that: Expression): String
  40. def emitExpressionNoWrappeForFirstOne(that: Expression): String
  41. def emitInitials(): Unit
  42. def emitLeafStatements(statements: ArrayBuffer[LeafStatement], statementIndexInit: Int, scope: ScopeStatement, assignmentKind: String, b: StringBuilder, tab: String): Int
  43. def emitMaskedLiteral(e: MaskedLiteral): String
  44. def emitMem(mem: Mem[_]): Unit
  45. def emitMems(mems: ArrayBuffer[Mem[_]]): Unit
  46. def emitMuxes(): Unit
  47. def emitReference(that: DeclarationStatement, sensitive: Boolean): String
  48. def emitReferenceNoOverrides(that: DeclarationStatement): String
  49. def emitSignals(): Unit
  50. def emitSubComponents(openSubIo: HashSet[BaseType]): Unit
  51. def emitSynchronous(component: Component, group: SyncGroup): Unit
  52. val enumDebugStringList: ArrayBuffer[(SpinalEnumCraft[_ <: SpinalEnum], String, Int)]
  53. def enumEgualsImpl(eguals: Boolean)(e: BinaryOperator with EnumEncoded): String
  54. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  55. def equals(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef → Any
  56. val expressionToWrap: LinkedHashSet[Expression]
    Definition Classes
    ComponentEmitter
  57. def fillExpressionToWrap(): Unit
  58. def getBaseTypeSignalInitBoot(signal: BaseType): String
  59. def getBaseTypeSignalRandBoot(signal: BaseType): String
  60. final def getClass(): Class[_ <: AnyRef]
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  61. def getOrDefault[X, Y](map: ConcurrentHashMap[X, Y], key: X, default: Y): Y
    Definition Classes
    ComponentEmitter
  62. def getTrace(): ComponentEmitterTrace
  63. def hashCode(): Int
    Definition Classes
    AnyRef → Any
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  64. def idToBits[T <: SpinalEnum](senum: SpinalEnumElement[T], encoding: SpinalEnumEncoding): String
  65. val initials: ArrayBuffer[LeafStatement]
    Definition Classes
    ComponentEmitter
  66. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  67. def isSubComponentInputBinded(data: BaseType): Expression
    Definition Classes
    ComponentEmitter
  68. val localEnums: LinkedHashSet[(SpinalEnum, SpinalEnumEncoding)]
  69. val localparams: StringBuilder
  70. val logics: StringBuilder
  71. var memBitsMaskKind: MemBitsMaskKind
  72. val mems: ArrayBuffer[Mem[_]]
    Definition Classes
    ComponentEmitter
  73. val mergeAsyncProcess: Boolean
    Definition Classes
    ComponentEmitterVerilog → ComponentEmitter
  74. val multiplexersPerSelect: LinkedHashMap[(Expression with WidthProvider, Int), ArrayBuffer[Multiplexer]]
    Definition Classes
    ComponentEmitter
  75. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  76. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  77. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native() @HotSpotIntrinsicCandidate()
  78. val openSubIo: HashSet[BaseType]
    Definition Classes
    ComponentEmitter
  79. def operatorImplAsBinaryOperator(verilog: String)(e: BinaryOperator): String
  80. def operatorImplAsBinaryOperatorLeftSigned(vhd: String)(op: BinaryOperator): String
  81. def operatorImplAsBinaryOperatorSigned(vhd: String)(op: BinaryOperator): String
  82. def operatorImplAsCat(e: Cat): String
  83. def operatorImplAsEnumToEnum(e: CastEnumToEnum): String
  84. def operatorImplAsMux(e: BinaryMultiplexer): String
  85. def operatorImplAsNoTransformation(func: Cast): String
  86. def operatorImplAsUnaryOperator(verilog: String)(e: UnaryOperator): String
  87. def operatorImplResize(func: Resize): String
  88. def operatorImplResizeSigned(func: Resize): String
  89. val outputsToBufferize: LinkedHashSet[BaseType]
    Definition Classes
    ComponentEmitter
  90. val portMaps: ArrayBuffer[String]
  91. val processes: LinkedHashSet[AsyncProcess]
    Definition Classes
    ComponentEmitter
  92. val randBoots: ArrayBuffer[BaseType]
  93. def readedOutputWrapEnable: Boolean
    Definition Classes
    ComponentEmitter
  94. def refImpl(e: BaseType): String
  95. def referenceSetAdd(str: String): Unit
  96. def referenceSetPause(): Unit
  97. def referenceSetResume(): Unit
  98. def referenceSetSorted(): LinkedHashSet[String]
  99. def referenceSetStart(): Unit
  100. def referenceSetStop(): Unit
  101. val referencesOverrides: HashMap[Nameable, Any]
    Definition Classes
    ComponentEmitter
  102. def result: String
  103. def shiftLeftByIntFixedWidthImpl(e: ShiftLeftByIntFixedWidth): String
  104. def shiftLeftByIntImpl(e: ShiftLeftByInt): String
  105. def shiftLeftByUIntImpl(e: ShiftLeftByUInt): String
  106. def shiftLeftByUIntImplSigned(e: ShiftLeftByUInt): String
  107. def shiftRightByIntFixedWidthImpl(e: ShiftRightByIntFixedWidth): String
  108. def shiftRightByIntImpl(e: ShiftRightByInt): String
  109. def shiftRightSignedByIntFixedWidthImpl(e: ShiftRightByIntFixedWidth): String
  110. val spinalConfig: SpinalConfig
    Definition Classes
    ComponentEmitterVerilog → ComponentEmitter
  111. val subComponentInputToNotBufferize: HashSet[Any]
    Definition Classes
    ComponentEmitter
  112. val syncGroups: LinkedHashMap[(ClockDomain, ScopeStatement, Boolean), SyncGroup]
    Definition Classes
    ComponentEmitter
  113. final def synchronized[T0](arg0: => T0): T0
    Definition Classes
    AnyRef
  114. def toString(): String
    Definition Classes
    AnyRef → Any
  115. var verilogIndexGenerated: Boolean
  116. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  117. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException]) @native()
  118. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.InterruptedException])
  119. def wrapSubInput(io: BaseType): Unit
    Definition Classes
    ComponentEmitterVerilog → ComponentEmitter
  120. val wrappedExpressionToName: HashMap[Expression, String]
    Definition Classes
    ComponentEmitter

Deprecated Value Members

  1. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws(classOf[java.lang.Throwable]) @Deprecated
    Deprecated

Inherited from ComponentEmitter

Inherited from AnyRef

Inherited from Any

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