Packages

class FibonacciLFSR extends PRNG with LFSR

Fibonacci Linear Feedback Shift Register (LFSR) generator.

A Fibonacci LFSR can be generated by defining a width and a set of tap points (corresponding to a polynomial). An optional initial seed and a reduction operation (XOR, the default, or XNOR) can be used to augment the generated hardware. The resulting hardware has support for a run-time programmable seed (via PRNGIO.seed) and conditional increment (via PRNGIO.increment).

If the user specifies a seed, then a compile-time check is added that they are not initializing the LFSR to a state which will cause it to lock up. If the user does not set a seed, then the least significant bit of the state will be set or reset based on the choice of reduction operator.

In the example below, a 4-bit Fibonacci LFSR is constructed. Tap points are defined as four and three (using LFSR convention of indexing from one). This results in the hardware configuration shown in the diagram.

val lfsr4 = Module(new FibonacciLFSR(4, Set(4, 3))
//                 +---+
// +-------------->|XOR|-------------------------------------------------------+
// |               +---+                                                       |
// |   +-------+     ^     +-------+           +-------+           +-------+   |
// |   |       |     |     |       |           |       |           |       |   |
// +---+  x^4  |<----+-----|  x^3  |<----------|  x^2  |<----------|  x^1  |<--+
//     |       |           |       |           |       |           |       |
//     +-------+           +-------+           +-------+           +-------+

If you require a maximal period Fibonacci LFSR of a specific width, you can use MaxPeriodFibonacciLFSR. If you only require a pseudorandom UInt you can use the FibonacciLFSR companion object.

Source
FibonacciLFSR.scala
See also

https://en.wikipedia.org/wiki/Linear-feedback_shift_register#Fibonacci_LFSRs

Linear Supertypes
LFSR, PRNG, LegacyModule, MultiIOModule, RawModule, BaseModule, HasId, internal.InstanceId, AnyRef, Any
Known Subclasses
MaxPeriodFibonacciLFSR
Type Hierarchy
Ordering
  1. Alphabetic
  2. By Inheritance
Inherited
  1. FibonacciLFSR
  2. LFSR
  3. PRNG
  4. LegacyModule
  5. MultiIOModule
  6. RawModule
  7. BaseModule
  8. HasId
  9. InstanceId
  10. AnyRef
  11. Any
  1. Hide All
  2. Show All
Visibility
  1. Public
  2. All

Instance Constructors

  1. new FibonacciLFSR(width: Int, taps: Set[Int], seed: Option[BigInt] = Some(1), reduction: LFSRReduce = XOR, step: Int = 1, updateSeed: Boolean = false)

    width

    the width of the LFSR

    taps

    a set of tap points to use when constructing the LFSR

    seed

    an initial value for internal LFSR state. If None, then the LFSR state LSB will be set to a known safe value on reset (to prevent lock up).

    reduction

    the reduction operation (either XOR or XNOR)

    step

    the number of state updates per cycle

    updateSeed

    if true, when loading the seed the state will be updated as if the seed were the current state, if false, the state will be set to the seed

Value Members

  1. final def !=(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  2. final def ##(): Int
    Definition Classes
    AnyRef → Any
  3. final def ==(arg0: Any): Boolean
    Definition Classes
    AnyRef → Any
  4. def IO[T <: Data](iodef: T): T
    Attributes
    protected
    Definition Classes
    BaseModule
  5. def _bindIoInPlace(iodef: Data): Unit
    Attributes
    protected
    Definition Classes
    BaseModule
  6. var _closed: Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  7. def _compatAutoWrapPorts(): Unit
    Definition Classes
    BaseModule
  8. def _compatIoPortBound(): Boolean
    Attributes
    protected
    Definition Classes
    LegacyModule
  9. final def asInstanceOf[T0]: T0
    Definition Classes
    Any
  10. def circuitName: String
    Attributes
    protected
    Definition Classes
    HasId
  11. final val clock: Clock
    Definition Classes
    MultiIOModule
  12. def clone(): AnyRef
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native()
  13. val compileOptions: CompileOptions
    Definition Classes
    RawModule
  14. def delta(s: Seq[Bool]): Seq[Bool]

    State update function

    State update function

    s

    input state

    returns

    the next state

    Definition Classes
    FibonacciLFSR → PRNG
  15. def desiredName: String
    Definition Classes
    BaseModule
  16. final def eq(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  17. def equals(that: Any): Boolean
    Definition Classes
    HasId → AnyRef → Any
  18. def finalize(): Unit
    Attributes
    protected[lang]
    Definition Classes
    AnyRef
    Annotations
    @throws( classOf[java.lang.Throwable] )
  19. final def getClass(): Class[_]
    Definition Classes
    AnyRef → Any
    Annotations
    @native()
  20. def getCommands: Seq[Command]
    Attributes
    protected
    Definition Classes
    RawModule
  21. def getIds: Seq[HasId]
    Attributes
    protected
    Definition Classes
    BaseModule
  22. def getModulePorts: Seq[Data]
    Attributes
    protected[chisel3]
    Definition Classes
    BaseModule
  23. lazy val getPorts: Seq[Port]
    Definition Classes
    RawModule
  24. def hashCode(): Int
    Definition Classes
    HasId → AnyRef → Any
  25. def instanceName: String
    Definition Classes
    BaseModule → HasId → InstanceId
  26. val io: PRNGIO
    Definition Classes
    PRNG → LegacyModule
  27. final def isInstanceOf[T0]: Boolean
    Definition Classes
    Any
  28. final lazy val name: String
    Definition Classes
    BaseModule
  29. def nameIds(rootClass: Class[_]): HashMap[HasId, String]
    Attributes
    protected
    Definition Classes
    BaseModule
  30. final def ne(arg0: AnyRef): Boolean
    Definition Classes
    AnyRef
  31. final def nextState(s: Seq[Bool]): Seq[Bool]

    The method that will be used to update the state of this PRNG

    The method that will be used to update the state of this PRNG

    s

    input state

    returns

    the next state after step applications of PRNG.delta

    Definition Classes
    PRNG
  32. final def notify(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native()
  33. final def notifyAll(): Unit
    Definition Classes
    AnyRef
    Annotations
    @native()
  34. var override_clock: Option[Clock]
    Attributes
    protected
    Definition Classes
    LegacyModule
  35. var override_reset: Option[Bool]
    Attributes
    protected
    Definition Classes
    LegacyModule
  36. def parentModName: String
    Definition Classes
    HasId → InstanceId
  37. def parentPathName: String
    Definition Classes
    HasId → InstanceId
  38. def pathName: String
    Definition Classes
    HasId → InstanceId
  39. def portsContains(elem: Data): Boolean
    Attributes
    protected
    Definition Classes
    BaseModule
  40. def portsSize: Int
    Attributes
    protected
    Definition Classes
    BaseModule
  41. val reduction: LFSRReduce

    The binary reduction operation used by this LFSR, either XOR or XNOR.

    The binary reduction operation used by this LFSR, either XOR or XNOR. This has the effect of mandating what seed is invalid.

    Definition Classes
    FibonacciLFSR → LFSR
  42. final val reset: Reset
    Definition Classes
    MultiIOModule
  43. def resetValue: Vec[Bool]

    Allow implementations to override the reset value, e.g., if some bits should be don't-cares.

    Allow implementations to override the reset value, e.g., if some bits should be don't-cares.

    Attributes
    protected
    Definition Classes
    LFSR → PRNG
  44. val seed: Option[BigInt]
    Definition Classes
    PRNG
  45. def suggestName(name: ⇒ String): FibonacciLFSR.this.type
    Definition Classes
    HasId
  46. final def synchronized[T0](arg0: ⇒ T0): T0
    Definition Classes
    AnyRef
  47. final def toAbsoluteTarget: IsModule
    Definition Classes
    BaseModule → InstanceId
  48. final def toNamed: ModuleName
    Definition Classes
    BaseModule → InstanceId
  49. def toString(): String
    Definition Classes
    AnyRef → Any
  50. final def toTarget: ModuleTarget
    Definition Classes
    BaseModule → InstanceId
  51. final def wait(): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  52. final def wait(arg0: Long, arg1: Int): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... )
  53. final def wait(arg0: Long): Unit
    Definition Classes
    AnyRef
    Annotations
    @throws( ... ) @native()
  54. val width: Int
    Definition Classes
    PRNG

Inherited from LFSR

Inherited from PRNG

Inherited from LegacyModule

Inherited from MultiIOModule

Inherited from RawModule

Inherited from BaseModule

Inherited from HasId

Inherited from internal.InstanceId

Inherited from AnyRef

Inherited from Any

Ungrouped