abstract class PRNG extends Module
An abstract class representing a Pseudo Random Number Generator (PRNG)
- Source
- PRNG.scala
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Inherited
- PRNG
- LegacyModule
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Visibility
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Instance Constructors
-
new
PRNG(width: Int, seed: Option[BigInt], step: Int = 1, updateSeed: Boolean = false)
- width
the width of the PRNG
- seed
the initial state of the PRNG
- step
the number of state updates per cycle
- updateSeed
if true, when loading the seed the state will be updated as if the seed were the current state, if false, the state will be set to the seed
Abstract Value Members
Concrete Value Members
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final
def
!=(arg0: Any): Boolean
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final
def
##(): Int
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final
def
==(arg0: Any): Boolean
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def
IO[T <: Data](iodef: T): T
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- BaseModule
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def
_bindIoInPlace(iodef: Data): Unit
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var
_closed: Boolean
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def
_compatAutoWrapPorts(): Unit
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def
_compatIoPortBound(): Boolean
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final
def
asInstanceOf[T0]: T0
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def
circuitName: String
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final
val
clock: Clock
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- MultiIOModule
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def
clone(): AnyRef
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val
compileOptions: CompileOptions
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- RawModule
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def
desiredName: String
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final
def
eq(arg0: AnyRef): Boolean
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def
equals(that: Any): Boolean
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def
finalize(): Unit
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final
def
getClass(): Class[_]
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def
getCommands: Seq[Command]
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def
getIds: Seq[HasId]
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- BaseModule
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def
getModulePorts: Seq[Data]
- Attributes
- protected[chisel3]
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lazy val
getPorts: Seq[Port]
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def
hashCode(): Int
- Definition Classes
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def
instanceName: String
- Definition Classes
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val
io: PRNGIO
- Definition Classes
- PRNG → LegacyModule
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final
def
isInstanceOf[T0]: Boolean
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final
lazy val
name: String
- Definition Classes
- BaseModule
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def
nameIds(rootClass: Class[_]): HashMap[HasId, String]
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- BaseModule
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final
def
ne(arg0: AnyRef): Boolean
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final
def
nextState(s: Seq[Bool]): Seq[Bool]
The method that will be used to update the state of this PRNG
The method that will be used to update the state of this PRNG
- s
input state
- returns
the next state after
stepapplications of PRNG.delta
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final
def
notify(): Unit
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final
def
notifyAll(): Unit
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var
override_clock: Option[Clock]
- Attributes
- protected
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- LegacyModule
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var
override_reset: Option[Bool]
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- protected
- Definition Classes
- LegacyModule
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def
parentModName: String
- Definition Classes
- HasId → InstanceId
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def
parentPathName: String
- Definition Classes
- HasId → InstanceId
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def
pathName: String
- Definition Classes
- HasId → InstanceId
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def
portsContains(elem: Data): Boolean
- Attributes
- protected
- Definition Classes
- BaseModule
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def
portsSize: Int
- Attributes
- protected
- Definition Classes
- BaseModule
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final
val
reset: Reset
- Definition Classes
- MultiIOModule
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def
resetValue: Vec[Bool]
Allow implementations to override the reset value, e.g., if some bits should be don't-cares.
Allow implementations to override the reset value, e.g., if some bits should be don't-cares.
- Attributes
- protected
- val seed: Option[BigInt]
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def
suggestName(name: ⇒ String): PRNG.this.type
- Definition Classes
- HasId
-
final
def
synchronized[T0](arg0: ⇒ T0): T0
- Definition Classes
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final
def
toAbsoluteTarget: IsModule
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final
def
toNamed: ModuleName
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def
toString(): String
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final
def
toTarget: ModuleTarget
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final
def
wait(): Unit
- Definition Classes
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- Annotations
- @throws( ... )
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final
def
wait(arg0: Long, arg1: Int): Unit
- Definition Classes
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- @throws( ... )
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final
def
wait(arg0: Long): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws( ... ) @native()
- val width: Int
This is the documentation for Chisel.
Package structure
The chisel3 package presents the public API of Chisel. It contains the concrete core types
UInt,SInt,Bool,FixedPoint,Clock, andReg, the abstract typesBits,Aggregate, andData, and the aggregate typesBundleandVec.The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.
Utility objects and methods are found in the
utilpackage.The
testerspackage defines the basic interface for chisel testers.