class Queue[T <: Data] extends Module
A hardware module implementing a Queue
- Source
- Decoupled.scala
val q = Module(new Queue(UInt(), 16)) q.io.enq <> producer.io.out consumer.io.in <> q.io.deq
Example:
Linear Supertypes
Known Subclasses
Type Hierarchy
Ordering
- Alphabetic
- By Inheritance
Inherited
- Queue
- Module
- RawModule
- BaseModule
- IsInstantiable
- HasId
- InstanceId
- AnyRef
- Any
- Hide All
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Visibility
- Public
- Protected
Instance Constructors
- new Queue(gen: T, entries: Int, pipe: Boolean = false, flow: Boolean = false, useSyncReadMem: Boolean = false, hasFlush: Boolean = false)(implicit compileOptions: CompileOptions)
- gen
The type of data to queue
- entries
The max number of entries in the queue
- pipe
True if a single entry queue can run at full throughput (like a pipeline). The ready signals are combinationally coupled.
- flow
True if the inputs can be consumed on the same cycle (the inputs "flow" through the queue immediately). The valid signals are coupled.
- useSyncReadMem
True uses SyncReadMem instead of Mem as an internal memory element.
- hasFlush
True if generated queue requires a flush feature
Value Members
- final def !=(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- final def ##: Int
- Definition Classes
- AnyRef → Any
- final def ==(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- def IO[T <: Data](iodef: T): T
- Attributes
- protected
- Definition Classes
- BaseModule
- def _bindIoInPlace(iodef: Data): Unit
- Attributes
- protected
- Definition Classes
- BaseModule
- var _closed: Boolean
- Attributes
- protected
- Definition Classes
- BaseModule
- def _compatAutoWrapPorts(): Unit
- Definition Classes
- BaseModule
- final def asInstanceOf[T0]: T0
- Definition Classes
- Any
- def circuitName: String
- Attributes
- protected
- Definition Classes
- HasId
- final val clock: Clock
- Definition Classes
- Module
- def clone(): AnyRef
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.CloneNotSupportedException]) @native() @HotSpotIntrinsicCandidate()
- val compileOptions: CompileOptions
- Definition Classes
- RawModule
- val deq_ptr: Counter
- def desiredName: String
- Definition Classes
- BaseModule
- val do_deq: Bool
- val do_enq: Bool
- val empty: Bool
- val enq_ptr: Counter
- val entries: Int
- final def eq(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- def equals(that: Any): Boolean
- Definition Classes
- HasId → AnyRef → Any
- val flow: Boolean
- val flush: Bool
- val full: Bool
- val gen: T
- val genType: T
- final def getClass(): Class[_ <: AnyRef]
- Definition Classes
- AnyRef → Any
- Annotations
- @native() @HotSpotIntrinsicCandidate()
- def getCommands: Seq[Command]
- Attributes
- protected
- Definition Classes
- RawModule
- def getModulePorts: Seq[Data]
- Attributes
- protected[chisel3]
- Definition Classes
- BaseModule
- val hasFlush: Boolean
- def hasSeed: Boolean
- Definition Classes
- HasId
- def hashCode(): Int
- Definition Classes
- HasId → AnyRef → Any
- def instanceName: String
- Definition Classes
- BaseModule → HasId → InstanceId
- val io: QueueIO[T]
- final def isInstanceOf[T0]: Boolean
- Definition Classes
- Any
- val maybe_full: Bool
- final lazy val name: String
- Definition Classes
- BaseModule
- def nameIds(rootClass: Class[_]): HashMap[HasId, String]
- Attributes
- protected
- Definition Classes
- BaseModule
- val namingContext$macro$8: NamingContextInterface
- final def ne(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- final def notify(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native() @HotSpotIntrinsicCandidate()
- final def notifyAll(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native() @HotSpotIntrinsicCandidate()
- def parentModName: String
- Definition Classes
- HasId → InstanceId
- def parentPathName: String
- Definition Classes
- HasId → InstanceId
- def pathName: String
- Definition Classes
- HasId → InstanceId
- val pipe: Boolean
- def portsContains(elem: Data): Boolean
- Attributes
- protected
- Definition Classes
- BaseModule
- def portsSize: Int
- Attributes
- protected
- Definition Classes
- BaseModule
- val ptr_diff: UInt
- val ptr_match: Bool
- val ram: MemBase[T]
- final val reset: Reset
- Definition Classes
- Module
- def suggestName(seed: => String): Queue.this.type
- Definition Classes
- HasId
- final def synchronized[T0](arg0: => T0): T0
- Definition Classes
- AnyRef
- final def toAbsoluteTarget: IsModule
- Definition Classes
- BaseModule → InstanceId
- final def toNamed: ModuleName
- Definition Classes
- BaseModule → InstanceId
- def toString(): String
- Definition Classes
- AnyRef → Any
- final def toTarget: ModuleTarget
- Definition Classes
- BaseModule → InstanceId
- val useSyncReadMem: Boolean
- final def wait(arg0: Long, arg1: Int): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException]) @native()
- final def wait(): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
Deprecated Value Members
- def finalize(): Unit
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.Throwable]) @Deprecated
- Deprecated
- lazy val getPorts: Seq[Port]
- Definition Classes
- RawModule
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.5) Use DataMirror.modulePorts instead. this API will be removed in Chisel 3.6
- def override_clock: Option[Clock]
- Attributes
- protected
- Definition Classes
- Module
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.5) Use withClock at Module instantiation
- def override_clock_=(rhs: Option[Clock]): Unit
- Attributes
- protected
- Definition Classes
- Module
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.5) Use withClock at Module instantiation
- def override_reset: Option[Bool]
- Attributes
- protected
- Definition Classes
- Module
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.5) Use withClock at Module instantiation
- def override_reset_=(rhs: Option[Bool]): Unit
- Attributes
- protected
- Definition Classes
- Module
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.5) Use withClock at Module instantiation
This is the documentation for Chisel.
Package structure
The chisel3 package presents the public API of Chisel. It contains the concrete core types
UInt,SInt,Bool,FixedPoint,Clock, andReg, the abstract typesBits,Aggregate, andData, and the aggregate typesBundleandVec.The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.
Utility objects and methods are found in the
utilpackage.The
testerspackage defines the basic interface for chisel testers.