sealed class Interval extends Bits with Num[Interval] with HasBinaryPoint
A sealed class representing a fixed point number that has a range, an additional parameter that can determine a minimum and maximum supported value. The range can be used to reduce the required widths particularly in primitive operations with other Intervals, the canonical example being
val one = 1.I val six = Seq.fill(6)(one).reduce(_ + _)
A UInt computed in this way would require a Width
binary point
The width and binary point may be inferred.
IMPORTANT: The API provided here is experimental and may change in the future.
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- Source
- Bits.scala
- Grouped
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- Interval
- HasBinaryPoint
- Num
- Bits
- ToBoolable
- Element
- Data
- SourceInfoDoc
- NamedComponent
- HasId
- InstanceId
- AnyRef
- Any
- by DataEquality
- by toConnectableDefault
- by ConnectableDefault
- by any2stringadd
- by StringFormat
- by Ensuring
- by ArrowAssoc
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- Public
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Value Members
- final def !=(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- final macro def ##(that: Bits): UInt
Concatenation operator
Concatenation operator
- that
a hardware component
- returns
this numeric-like type concatenated to the most significant end of
that
- Definition Classes
- Bits
- Note
The width of the returned hardware type is
width of this+width of that.
- final def ##: Int
- Definition Classes
- AnyRef → Any
- final macro def %(that: Interval): Interval
Modulo operator
Modulo operator
- that
a hardware type
- returns
the remainder of this numeric-like type divided by
that
- Definition Classes
- Num
- Note
This method generates a fully combinational divider which can result in significant cycle time and area costs.
- final macro def *(that: Interval): Interval
Multiplication operator
Multiplication operator
- that
a hardware type
- returns
the product of this numeric-like type and
that
- Definition Classes
- Num
- Note
The width of the returned hardware type is
,width of this+width of that.This method generates a fully combinational multiplier which can result in significant cycle time and area costs.
- final macro def +(that: Interval): Interval
Addition operator
Addition operator
- that
a hardware type
- returns
the sum of this numeric-like type and
that
- Definition Classes
- Num
- Note
The width of the returned hardware type is
max(width of this, width of that).
- final macro def -(that: Interval): Interval
Subtraction operator
Subtraction operator
- that
a hardware type
- returns
the difference of this numeric-like type less
that
- Definition Classes
- Num
- Note
The width of the returned hardware type is
max(width of this, width of that) + 1.
- def ->[B](y: B): (Interval, B)
- final macro def /(that: Interval): Interval
Division operator
Division operator
- that
a hardware type
- returns
the quotient of this numeric-like type divided by
that
- Definition Classes
- Num
- To do
full rules
- Note
This method generates a fully combinational divider which can result in significant cycle time and area costs.
- final def :#=(producer: DontCare.type)(implicit sourceInfo: SourceInfo): Unit
The "mono-direction connection operator", aka the "coercion operator".
The "mono-direction connection operator", aka the "coercion operator".
For
consumer :#= producer, all leaf members of consumer (regardless of relative flip) are driven by the corresponding leaf members of producer (regardless of relative flip)Identical to calling :<= and :>=, but swapping consumer/producer for :>= (order is irrelevant), e.g.: consumer :<= producer producer :>= consumer
Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '#' means to ignore flips, always drive from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes: - Connecting two
util.DecoupledIO's would connectbits,valid, ANDreadyfrom producer to consumer (despitereadybeing flipped) - Functionally equivalent to chisel3.:=, but different than Chisel.:=- producer
the right-hand-side of the connection, all members will be driving, none will be driven-to
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :#=[S <: Data](producer: connectable.Connectable[S])(implicit evidence: =:=[Interval, S], sourceInfo: SourceInfo): Unit
The "mono-direction connection operator", aka the "coercion operator".
The "mono-direction connection operator", aka the "coercion operator".
For
consumer :#= producer, all leaf members of consumer (regardless of relative flip) are driven by the corresponding leaf members of producer (regardless of relative flip)Identical to calling :<= and :>=, but swapping consumer/producer for :>= (order is irrelevant), e.g.: consumer :<= producer producer :>= consumer
Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '#' means to ignore flips, always drive from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes: - Connecting two
util.DecoupledIO's would connectbits,valid, ANDreadyfrom producer to consumer (despitereadybeing flipped) - Functionally equivalent to chisel3.:=, but different than Chisel.:=- producer
the right-hand-side of the connection, all members will be driving, none will be driven-to
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :#=[S <: Data](lProducer: => S)(implicit evidence: =:=[Interval, S], sourceInfo: SourceInfo): Unit
The "mono-direction connection operator", aka the "coercion operator".
The "mono-direction connection operator", aka the "coercion operator".
For
consumer :#= producer, all leaf members of consumer (regardless of relative flip) are driven by the corresponding leaf members of producer (regardless of relative flip)Identical to calling :<= and :>=, but swapping consumer/producer for :>= (order is irrelevant), e.g.: consumer :<= producer producer :>= consumer
Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '#' means to ignore flips, always drive from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes: - Connecting two
util.DecoupledIO's would connectbits,valid, ANDreadyfrom producer to consumer (despitereadybeing flipped) - Functionally equivalent to chisel3.:=, but different than Chisel.:=- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<=(producer: DontCare.type)(implicit sourceInfo: SourceInfo): Unit
The "aligned connection operator" between a producer and consumer.
The "aligned connection operator" between a producer and consumer.
For
consumer :<= producer, each ofconsumer's leaf members which are aligned with respect toconsumerare driven from the correspondingproducerleaf member. Onlyconsumer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectbitsandvalidfrom producer to consumer, but leavereadyunconnected
- producer
the right-hand-side of the connection; will always drive leaf connections, and never get driven by leaf connections ("aligned connection")
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<=[S <: Data](producer: connectable.Connectable[S])(implicit evidence: =:=[Interval, S], sourceInfo: SourceInfo): Unit
The "aligned connection operator" between a producer and consumer.
The "aligned connection operator" between a producer and consumer.
For
consumer :<= producer, each ofconsumer's leaf members which are aligned with respect toconsumerare driven from the correspondingproducerleaf member. Onlyconsumer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectbitsandvalidfrom producer to consumer, but leavereadyunconnected
- producer
the right-hand-side of the connection; will always drive leaf connections, and never get driven by leaf connections ("aligned connection")
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<=[S <: Data](lProducer: => S)(implicit evidence: =:=[Interval, S], sourceInfo: SourceInfo): Unit
The "aligned connection operator" between a producer and consumer.
The "aligned connection operator" between a producer and consumer.
For
consumer :<= producer, each ofconsumer's leaf members which are aligned with respect toconsumerare driven from the correspondingproducerleaf member. Onlyconsumer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectbitsandvalidfrom producer to consumer, but leavereadyunconnected
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<>=(producer: DontCare.type)(implicit sourceInfo: SourceInfo): Unit
The "bi-direction connection operator", aka the "tur-duck-en operator"
The "bi-direction connection operator", aka the "tur-duck-en operator"
For
consumer :<>= producer, both producer and consumer leafs could be driving or be driven-to. Theconsumer's members aligned w.r.t.consumerwill be driven by corresponding members ofproducer; theproducer's members flipped w.r.t.producerwill be driven by corresponding members ofconsumerIdentical to calling
:<=and:>=in sequence (order is irrelevant), e.g.consumer :<= producerthenconsumer :>= producerSymbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
- An additional type restriction is that all relative orientations of
consumerandproducermust match exactly.
Additional notes:
- Connecting two wires of
util.DecoupledIOchisel type would connectbitsandvalidfrom producer to consumer, andreadyfrom consumer to producer. - If the types of consumer and producer also have identical relative flips, then we can emit FIRRTL.<= as it is a stricter version of chisel3.:<>=
- "turk-duck-en" is a dish where a turkey is stuffed with a duck, which is stuffed with a chicken;
:<>=is a:=stuffed with a<>
- producer
the right-hand-side of the connection
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<>=[S <: Data](producer: connectable.Connectable[S])(implicit evidence: =:=[Interval, S], sourceInfo: SourceInfo): Unit
The "bi-direction connection operator", aka the "tur-duck-en operator"
The "bi-direction connection operator", aka the "tur-duck-en operator"
For
consumer :<>= producer, both producer and consumer leafs could be driving or be driven-to. Theconsumer's members aligned w.r.t.consumerwill be driven by corresponding members ofproducer; theproducer's members flipped w.r.t.producerwill be driven by corresponding members ofconsumerIdentical to calling
:<=and:>=in sequence (order is irrelevant), e.g.consumer :<= producerthenconsumer :>= producerSymbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
- An additional type restriction is that all relative orientations of
consumerandproducermust match exactly.
Additional notes:
- Connecting two wires of
util.DecoupledIOchisel type would connectbitsandvalidfrom producer to consumer, andreadyfrom consumer to producer. - If the types of consumer and producer also have identical relative flips, then we can emit FIRRTL.<= as it is a stricter version of chisel3.:<>=
- "turk-duck-en" is a dish where a turkey is stuffed with a duck, which is stuffed with a chicken;
:<>=is a:=stuffed with a<>
- producer
the right-hand-side of the connection
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :<>=[S <: Data](lProducer: => S)(implicit evidence: =:=[Interval, S], sourceInfo: SourceInfo): Unit
The "bi-direction connection operator", aka the "tur-duck-en operator"
The "bi-direction connection operator", aka the "tur-duck-en operator"
For
consumer :<>= producer, both producer and consumer leafs could be driving or be driven-to. Theconsumer's members aligned w.r.t.consumerwill be driven by corresponding members ofproducer; theproducer's members flipped w.r.t.producerwill be driven by corresponding members ofconsumerIdentical to calling
:<=and:>=in sequence (order is irrelevant), e.g.consumer :<= producerthenconsumer :>= producerSymbol reference:
- ':' is the consumer side
- '=' is the producer side
- '<' means to connect from producer to consumer
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
- An additional type restriction is that all relative orientations of
consumerandproducermust match exactly.
Additional notes:
- Connecting two wires of
util.DecoupledIOchisel type would connectbitsandvalidfrom producer to consumer, andreadyfrom consumer to producer. - If the types of consumer and producer also have identical relative flips, then we can emit FIRRTL.<= as it is a stricter version of chisel3.:<>=
- "turk-duck-en" is a dish where a turkey is stuffed with a duck, which is stuffed with a chicken;
:<>=is a:=stuffed with a<>
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :=(that: => Data)(implicit sourceInfo: SourceInfo, connectionCompileOptions: CompileOptions): Unit
The "strong connect" operator.
The "strong connect" operator.
For chisel3._, this operator is mono-directioned; all sub-elements of
thiswill be driven by sub-elements ofthat.- Equivalent to
this :#= that
For Chisel._, this operator connections bi-directionally via emitting the FIRRTL.<=
- Equivalent to
this :<>= that
- that
the Data to connect from
- Definition Classes
- Data
- Equivalent to
- final def :>=(producer: DontCare.type)(implicit sourceInfo: SourceInfo): Unit
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
For
consumer :>= producer, each ofproducer's leaf members which are flipped with respect toproducerare driven from the corresponding consumer leaf member Onlyproducer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectreadyfrom consumer to producer, but leavebitsandvalidunconnected
- producer
the right-hand-side of the connection; will always be driven by leaf connections, and never drive leaf connections ("flipped connection")
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :>=[S <: Data](producer: connectable.Connectable[S])(implicit evidence: =:=[Interval, S], sourceInfo: SourceInfo): Unit
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
For
consumer :>= producer, each ofproducer's leaf members which are flipped with respect toproducerare driven from the corresponding consumer leaf member Onlyproducer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectreadyfrom consumer to producer, but leavebitsandvalidunconnected
- producer
the right-hand-side of the connection; will always be driven by leaf connections, and never drive leaf connections ("flipped connection")
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final def :>=[S <: Data](lProducer: => S)(implicit evidence: =:=[Interval, S], sourceInfo: SourceInfo): Unit
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
The "flipped connection operator", or the "backpressure connection operator" between a producer and consumer.
For
consumer :>= producer, each ofproducer's leaf members which are flipped with respect toproducerare driven from the corresponding consumer leaf member Onlyproducer's leaf/branch alignments influence the connection.Symbol reference:
- ':' is the consumer side
- '=' is the producer side
- '>' means to connect from consumer to producer
The following restrictions apply:
- The Chisel type of consumer and producer must be the "same shape" recursively:
- All ground types are the same (UInt and UInt are same, SInt and UInt are not), but widths can be different (implicit trunction/padding occurs)
- All vector types are the same length
- All bundle types have the same member names, but the flips of members can be different between producer and consumer
- The leaf members that are ultimately assigned to, must be assignable. This means they cannot be module inputs or instance outputs.
Additional notes:
- Connecting two
util.DecoupledIO's would connectreadyfrom consumer to producer, but leavebitsandvalidunconnected
- Implicit
- This member is added by an implicit conversion from Interval toConnectableDefault[Interval] performed by method ConnectableDefault in chisel3.Data.
- Definition Classes
- ConnectableOpExtension
- final macro def <(that: Interval): Bool
Less than operator
- final macro def <<(that: UInt): Bits
Dynamic left shift operator
Dynamic left shift operator
- that
a hardware component
- returns
this numeric-like type dynamically shifted left by
thatmany places, shifting in zeros from the right
- Definition Classes
- Bits
- Note
The width of the returned numeric-like type is
width of this + pow(2, width of that) - 1.
- final macro def <<(that: Int): Bits
Static left shift operator
Static left shift operator
- that
an amount to shift by
- returns
this numeric-like type with
thatmany zeros concatenated to its least significant end
- Definition Classes
- Bits
- Note
The width of the returned numeric-like type is
width of this+that.
- final macro def <<(that: BigInt): Bits
Static left shift operator
Static left shift operator
- that
an amount to shift by
- returns
this numeric-like type with
thatmany zeros concatenated to its least significant end
- Definition Classes
- Bits
- Note
The width of the returned numeric-like type is
width of this+that.
- final macro def <=(that: Interval): Bool
Less than or equal to operator
- final def <>(that: => Data)(implicit sourceInfo: SourceInfo, connectionCompileOptions: CompileOptions): Unit
The "bulk connect operator", assigning elements in this Vec from elements in a Vec.
The "bulk connect operator", assigning elements in this Vec from elements in a Vec.
For chisel3._, uses the
chisel3.internal.BiConnectalgorithm; sub-elements of thatmay end up driving sub-elements ofthis- Complicated semantics, hard to write quickly, will likely be deprecated in the future
For Chisel._, emits the FIRRTL.<- operator
- Equivalent to
this :<>= thatwithout the restrictions that bundle field names and vector sizes must match
- that
the Data to connect from
- Definition Classes
- Data
- final def ==(arg0: Any): Boolean
- Definition Classes
- AnyRef → Any
- final macro def >(that: Interval): Bool
Greater than operator
- final macro def >=(that: Interval): Bool
Greater than or equal to operator
- final macro def >>(that: UInt): Bits
Dynamic right shift operator
Dynamic right shift operator
- that
a hardware component
- returns
this numeric-like type dynamically shifted right by the value of
thatcomponent, inserting zeros into the most significant bits.
- Definition Classes
- Bits
- Note
The width of the returned hardware type is unchanged, i.e., the
width of this.
- final macro def >>(that: Int): Bits
Static right shift operator
Static right shift operator
- that
an amount to shift by
- returns
this numeric-like type with
thatmany least significant bits truncated
- Definition Classes
- Bits
- Note
The width of the returned hardware type is unchanged, i.e., the
width of this.
- final macro def >>(that: BigInt): Bits
Static right shift operator
Static right shift operator
- that
an amount to shift by
- returns
this numeric-like type with
thatmany least significant bits truncated
- Definition Classes
- Bits
- Note
The width of the returned hardware type is unchanged, i.e., the
width of this.
- final macro def abs: Interval
Absolute value operator
Absolute value operator
- returns
a hardware type with a value equal to the absolute value of this numeric-like type
- Definition Classes
- Num
- Note
The width of the returned hardware type is unchanged, i.e., the
width of this.
- final macro def apply(x: BigInt, y: BigInt): UInt
Returns a subset of bits on this numeric-like type from
hitolo(inclusive), statically addressed.Returns a subset of bits on this numeric-like type from
hitolo(inclusive), statically addressed.- x
the high bit
- y
the low bit
- returns
a hardware component contain the requested bits
- Definition Classes
- Bits
myBits = 0x5 = 0b101 myBits(1,0) => 0b01 // extracts the two least significant bits
Example: - final macro def apply(x: Int, y: Int): UInt
Returns a subset of bits on this numeric-like type from
hitolo(inclusive), statically addressed.Returns a subset of bits on this numeric-like type from
hitolo(inclusive), statically addressed.- x
the high bit
- y
the low bit
- returns
a hardware component contain the requested bits
- Definition Classes
- Bits
myBits = 0x5 = 0b101 myBits(1,0) => 0b01 // extracts the two least significant bits
Example: - final macro def apply(x: UInt): Bool
Returns the specified bit on this wire as a Bool, dynamically addressed.
- final macro def apply(x: Int): Bool
Returns the specified bit on this numeric-like type as a Bool, statically addressed.
- final macro def apply(x: BigInt): Bool
Returns the specified bit on this numeric-like type as a Bool, statically addressed.
- final macro def asBool: Bool
Casts this numeric-like type to a Bool
Casts this numeric-like type to a Bool
- Definition Classes
- ToBoolable
- Note
The width must be known and equal to 1
- final macro def asBools: Seq[Bool]
Returns the contents of this wire as a scala.collection.Seq of Bool.
Returns the contents of this wire as a scala.collection.Seq of Bool.
- Definition Classes
- Bits
- final def asInstanceOf[T0]: T0
- Definition Classes
- Any
- final macro def asSInt: SInt
Reinterpret this numeric-like type as an SInt
- macro def asTypeOf[T <: Data](that: T): T
Does a reinterpret cast of the bits in this node into the format that provides.
Does a reinterpret cast of the bits in this node into the format that provides. Returns a new Wire of that type. Does not modify existing nodes.
x.asTypeOf(that) performs the inverse operation of x := that.toBits.
- Definition Classes
- Data
- Note
bit widths are NOT checked, may pad or drop bits from input
,that should have known widths
- final macro def asUInt: UInt
Reinterpret cast to UInt.
Reinterpret cast to UInt.
- Definition Classes
- Data
- Note
value not guaranteed to be preserved: for example, a SInt of width 3 and value -1 (0b111) would become an UInt with value 7
,Aggregates are recursively packed with the first element appearing in the least-significant bits of the result.
- def autoSeed(name: String): Interval.this.type
Takes the last seed suggested.
Takes the last seed suggested. Multiple calls to this function will take the last given seed, unless this HasId is a module port (see overridden method in Data.scala).
If the final computed name conflicts with the final name of another signal, the final name may get uniquified by appending a digit at the end of the name.
Is a lower priority than suggestName, in that regardless of whether autoSeed was called, suggestName will always take precedence if it was called.
- returns
this object
- Definition Classes
- Data → HasId
- val base: Interval
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def binding: Option[Binding]
- def binding_=(target: Binding): Unit
- Attributes
- protected
- Definition Classes
- Data
- def circuitName: String
- Attributes
- protected
- Definition Classes
- HasId
- def clone(): AnyRef
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.CloneNotSupportedException]) @native() @HotSpotIntrinsicCandidate()
- def cloneType: Interval.this.type
Internal API; Chisel users should look at chisel3.chiselTypeOf(...).
- def do_!=(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- def do_##(that: Bits)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): UInt
- Definition Classes
- Bits
- def do_%(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_&(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_*(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_+(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
add (default - growing) operator
- def do_+%(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_+&(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_-(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
subtract (default - growing) operator
- def do_-%(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_-&(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_/(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_<(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- def do_<<(that: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_<<(that: BigInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_<<(that: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_<=(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- def do_=/=(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- def do_===(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- def do_>(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- def do_>=(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- def do_>>(that: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_>>(that: BigInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_>>(that: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_^(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_abs(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- final def do_apply(x: BigInt, y: BigInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): UInt
- Definition Classes
- Bits
- final def do_apply(x: Int, y: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): UInt
- Definition Classes
- Bits
- final def do_apply(x: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- Definition Classes
- Bits
- final def do_apply(x: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- Definition Classes
- Bits
- final def do_apply(x: BigInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- Definition Classes
- Bits
- final def do_asBool(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- Definition Classes
- Bits → ToBoolable
- def do_asBools(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Seq[Bool]
- Definition Classes
- Bits
- def do_asFixedPoint(binaryPoint: BinaryPoint)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): FixedPoint
- def do_asInterval(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_asInterval(that: IntervalRange)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- Definition Classes
- Bits
- def do_asSInt(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): SInt
- def do_asTypeOf[T <: Data](that: T)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): T
- Definition Classes
- Data
- def do_asUInt(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): UInt
- def do_clip(that: IntervalRange)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_clip(that: SInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_clip(that: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_clip(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_decreasePrecision(that: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- final def do_extract(x: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- Definition Classes
- Bits
- final def do_extract(x: BigInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Bool
- Definition Classes
- Bits
- def do_fromBits(that: Bits)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval.this.type
- def do_head(n: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): UInt
- Definition Classes
- Bits
- def do_increasePrecision(that: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_max(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- Definition Classes
- Num
- def do_min(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- Definition Classes
- Num
- def do_pad(that: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval.this.type
- Definition Classes
- Bits
- def do_setPrecision(that: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_squeeze(that: IntervalRange)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_squeeze(that: SInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_squeeze(that: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_squeeze(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_tail(n: Int)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): UInt
- Definition Classes
- Bits
- def do_unary_-(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_unary_-%(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_unary_~(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
Returns this wire bitwise-inverted.
- def do_wrap(that: IntervalRange)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_wrap(that: SInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_wrap(that: UInt)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_wrap(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def do_|(that: Interval)(implicit sourceInfo: SourceInfo, compileOptions: CompileOptions): Interval
- def ensuring(cond: (Interval) => Boolean, msg: => Any): Interval
- def ensuring(cond: (Interval) => Boolean): Interval
- def ensuring(cond: Boolean, msg: => Any): Interval
- def ensuring(cond: Boolean): Interval
- final def eq(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- def equals(that: Any): Boolean
- Definition Classes
- HasId → AnyRef → Any
- def exclude(members: (Interval) => Data*): connectable.Connectable[Interval]
Select members of base to exclude
Select members of base to exclude
- members
functions given the base return a member to exclude
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def exclude: connectable.Connectable[Interval]
Adds base to excludes
Adds base to excludes
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def excludeAs[S <: Data](members: (Interval) => Data*)(implicit ev: <:<[Interval, S]): connectable.Connectable[S]
Select members of base to exclude and static cast to a new type
Select members of base to exclude and static cast to a new type
- members
functions given the base return a member to exclude
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def excludeEach[S <: Data](pf: PartialFunction[Data, Seq[Data]])(implicit ev: <:<[Interval, S]): connectable.Connectable[S]
Programmatically select members of base to exclude and static cast to a new type
Programmatically select members of base to exclude and static cast to a new type
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- final macro def extract(x: UInt): Bool
Returns the specified bit on this wire as a Bool, dynamically addressed.
- final macro def extract(x: BigInt): Bool
Returns the specified bit on this numeric-like type as a Bool, statically addressed.
- final def getClass(): Class[_ <: AnyRef]
- Definition Classes
- AnyRef → Any
- Annotations
- @native() @HotSpotIntrinsicCandidate()
- final def getWidth: Int
Returns the width, in bits, if currently known.
Returns the width, in bits, if currently known.
- Definition Classes
- Data
- def hasSeed: Boolean
- returns
Whether either autoName or suggestName has been called
- Definition Classes
- HasId
- def hashCode(): Int
- Definition Classes
- HasId → AnyRef → Any
- final macro def head(n: Int): UInt
Head operator
Head operator
- n
the number of bits to take
- returns
The
nmost significant bits of this numeric-like type
- Definition Classes
- Bits
- def instanceName: String
- Definition Classes
- HasId → InstanceId
- final def isInstanceOf[T0]: Boolean
- Definition Classes
- Any
- def isLit: Boolean
- Definition Classes
- Data
- final def isWidthKnown: Boolean
Returns whether the width is currently known.
Returns whether the width is currently known.
- Definition Classes
- Data
- def litOption: Option[BigInt]
If this is a literal that is representable as bits, returns the value as a BigInt.
- def litValue: BigInt
Returns the literal value if this is a literal that is representable as bits, otherwise crashes.
Returns the literal value if this is a literal that is representable as bits, otherwise crashes.
- Definition Classes
- Data
- final macro def max(that: Interval): Interval
Maximum operator
Maximum operator
- that
a hardware type
- returns
a hardware type with a value equal to the minimum value of this numeric-like type and
that
- Definition Classes
- Num
- Note
The width of the returned hardware type is
max(width of this, width of that).
- final macro def min(that: Interval): Interval
Minimum operator
Minimum operator
- that
a hardware numeric-like type
- returns
a hardware type with a value equal to the minimum value of this numeric-like type and
that
- Definition Classes
- Num
- Note
The width of the returned hardware type is
max(width of this, width of that).
- def name: String
- Definition Classes
- Element
- final def ne(arg0: AnyRef): Boolean
- Definition Classes
- AnyRef
- def notWaivedOrSqueezedOrExcluded: Boolean
True if no members are waived or squeezed or excluded
True if no members are waived or squeezed or excluded
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- final def notify(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native() @HotSpotIntrinsicCandidate()
- final def notifyAll(): Unit
- Definition Classes
- AnyRef
- Annotations
- @native() @HotSpotIntrinsicCandidate()
- final macro def pad(that: Int): Interval.this.type
Pad operator
- def parentModName: String
- Definition Classes
- HasId → InstanceId
- def parentPathName: String
- Definition Classes
- HasId → InstanceId
- def pathName: String
- Definition Classes
- HasId → InstanceId
- val range: IntervalRange
- def squeezeAll: connectable.Connectable[Interval]
Squeeze all members of base
Squeeze all members of base
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def squeezeEach[S <: Data](pf: PartialFunction[Data, Seq[Data]]): connectable.Connectable[Interval]
Programmatically select members of base to squeeze
Programmatically select members of base to squeeze
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def suggestName(seed: => String): Interval.this.type
Takes the first seed suggested.
Takes the first seed suggested. Multiple calls to this function will be ignored. If the final computed name conflicts with another name, it may get uniquified by appending a digit at the end.
Is a higher priority than
autoSeed, in that regardless of whetherautoSeedwas called, suggestName will always take precedence.- seed
The seed for the name of this component
- returns
this object
- Definition Classes
- HasId
- final def synchronized[T0](arg0: => T0): T0
- Definition Classes
- AnyRef
- final macro def tail(n: Int): UInt
Tail operator
Tail operator
- n
the number of bits to remove
- returns
This numeric-like type with the
nmost significant bits removed.
- Definition Classes
- Bits
- final def toAbsoluteTarget: ReferenceTarget
Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph
Returns a FIRRTL IsMember that refers to the absolute path to this object in the elaborated hardware graph
- Definition Classes
- NamedComponent → InstanceId
- final def toNamed: ComponentName
Returns a FIRRTL ComponentName that references this object
Returns a FIRRTL ComponentName that references this object
- Definition Classes
- NamedComponent → InstanceId
- Note
Should not be called until circuit elaboration is complete
- final def toPrintable: Printable
Default print as Decimal
- final def toTarget: ReferenceTarget
Returns a FIRRTL ReferenceTarget that references this object
Returns a FIRRTL ReferenceTarget that references this object
- Definition Classes
- NamedComponent → InstanceId
- Note
Should not be called until circuit elaboration is complete
- final macro def unary_~: Bits
Bitwise inversion operator
Bitwise inversion operator
- returns
this numeric-like type with each bit inverted
- Definition Classes
- Bits
- final def validateShiftAmount(x: Int)(implicit sourceInfo: SourceInfo): Int
- Attributes
- protected
- Definition Classes
- Bits
- final def wait(arg0: Long, arg1: Int): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- final def wait(arg0: Long): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException]) @native()
- final def wait(): Unit
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.InterruptedException])
- def waive(members: (Interval) => Data*): connectable.Connectable[Interval]
Select members of base to waive
Select members of base to waive
- members
functions given the base return a member to waive
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def waiveAll: connectable.Connectable[Interval]
Waive all members of base
Waive all members of base
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def waiveAllAs[S <: Data](implicit ev: <:<[Interval, S]): connectable.Connectable[S]
Waive all members of base and static cast to a new type
Waive all members of base and static cast to a new type
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def waiveAs[S <: Data](members: (Interval) => Data*)(implicit ev: <:<[Interval, S]): connectable.Connectable[S]
Select members of base to waive and static cast to a new type
Select members of base to waive and static cast to a new type
- members
functions given the base return a member to waive
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def waiveEach[S <: Data](pf: PartialFunction[Data, Seq[Data]])(implicit ev: <:<[Interval, S]): connectable.Connectable[S]
Programmatically select members of base to waive and static cast to a new type
Programmatically select members of base to waive and static cast to a new type
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Definition Classes
- Connectable
- def widthKnown: Boolean
- Definition Classes
- Element
- final def widthOption: Option[Int]
Returns Some(width) if the width is known, else None.
Returns Some(width) if the width is known, else None.
- Definition Classes
- Data
Shadowed Implicit Value Members
- def +(other: String): String
- Implicit
- This member is added by an implicit conversion from Interval toany2stringadd[Interval] performed by method any2stringadd in scala.Predef.
- Shadowing
- This implicitly inherited member is shadowed by one or more members in this class.
To access this member you can use a type ascription:(interval: any2stringadd[Interval]).+(other)
- Definition Classes
- any2stringadd
- def ===(rhs: Interval): Bool
Dynamic recursive equality operator for generic Data
Dynamic recursive equality operator for generic Data
- Implicit
- This member is added by an implicit conversion from Interval toDataEquality[Interval] performed by method DataEquality in chisel3.Data.
- Shadowing
- This implicitly inherited member is shadowed by one or more members in this class.
To access this member you can use a type ascription:(interval: DataEquality[Interval]).===(rhs)
- Definition Classes
- DataEquality
- Exceptions thrown
ChiselExceptionwhenlhsandrhsare different types during elaboration time
- def squeeze(members: (Interval) => Data*): connectable.Connectable[Interval]
Select members of base to squeeze
Select members of base to squeeze
- members
functions given the base return a member to squeeze
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Shadowing
- This implicitly inherited member is shadowed by one or more members in this class.
To access this member you can use a type ascription:(interval: Connectable[Interval]).squeeze(members)
- Definition Classes
- Connectable
- def squeeze: connectable.Connectable[Interval]
Adds base to squeezes
Adds base to squeezes
- Implicit
- This member is added by an implicit conversion from Interval toConnectable[Interval] performed by method toConnectableDefault in chisel3.Data.
- Shadowing
- This implicitly inherited member is shadowed by one or more members in this class.
To access this member you can use a type ascription:(interval: Connectable[Interval]).squeeze
- Definition Classes
- Connectable
Deprecated Value Members
- final macro def !=(that: Interval): Bool
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def &(that: Interval): Interval
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def +%(that: Interval): Interval
add (no growth) operator
add (no growth) operator
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def +&(that: Interval): Interval
add (width +1) operator
add (width +1) operator
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def -%(that: Interval): Interval
subtract (no growth) operator
subtract (no growth) operator
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def -&(that: Interval): Interval
subtract (width +1) operator
subtract (width +1) operator
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def =/=(that: Interval): Bool
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def ===(that: Interval): Bool
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def ^(that: Interval): Interval
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def asFixedPoint(that: BinaryPoint): FixedPoint
Reinterpret this numeric-like type as a
FixedPoint.Reinterpret this numeric-like type as a
FixedPoint.- Definition Classes
- Bits
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- Note
The value is not guaranteed to be preserved. For example, a UInt of width 3 and value 7 (0b111) would become a
FixedPointwith value -1. The interpretation of the number is also affected by the specified binary point. Caution is advised!
- final macro def asInterval(that: IntervalRange): Interval
Reinterpret cast as a Interval.
Reinterpret cast as a Interval.
- Definition Classes
- Bits
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- Note
value not guaranteed to be preserved: for example, an UInt of width 3 and value 7 (0b111) would become a FixedInt with value -1, the interpretation of the number is also affected by the specified binary point. Caution advised
- def binaryPoint: BinaryPoint
- Definition Classes
- Interval → HasBinaryPoint
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def clip(that: IntervalRange): Interval
Clip this interval into the range determined by argument's range Adds hardware to move values outside of clipped range to the boundary Ignores binary point of argument
Clip this interval into the range determined by argument's range Adds hardware to move values outside of clipped range to the boundary Ignores binary point of argument
- that
an SInt whose width determines the clipping
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def clip(that: SInt): Interval
Clip this interval into the range determined by argument's range Adds hardware to move values outside of clipped range to the boundary
Clip this interval into the range determined by argument's range Adds hardware to move values outside of clipped range to the boundary
- that
an SInt whose width determines the clipping
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def clip(that: UInt): Interval
Clip this interval into the range determined by argument's range Adds hardware to change values outside of clipped range to be at the boundary
Clip this interval into the range determined by argument's range Adds hardware to change values outside of clipped range to be at the boundary
- that
an UInt whose width determines the clipping
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def clip(that: Interval): Interval
Clip this interval into the range determined by argument's range Adds hardware to change values outside of clipped range to be at the boundary Ignores binary point of argument
Clip this interval into the range determined by argument's range Adds hardware to change values outside of clipped range to be at the boundary Ignores binary point of argument
- that
an Interval whose properties determine the clipping
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- def connect(that: Data)(implicit sourceInfo: SourceInfo, connectCompileOptions: CompileOptions): Unit
- final macro def decreasePrecision(that: Int): Interval
Decrease the precision of this Interval, moves the binary point to the right.
Decrease the precision of this Interval, moves the binary point to the right. aaa.bbb -> aaa.b
- that
number of bits to move binary point
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- def finalize(): Unit
- Attributes
- protected[lang]
- Definition Classes
- AnyRef
- Annotations
- @throws(classOf[java.lang.Throwable]) @Deprecated
- Deprecated
- def formatted(fmtstr: String): String
- Implicit
- This member is added by an implicit conversion from Interval toStringFormat[Interval] performed by method StringFormat in scala.Predef.
- Definition Classes
- StringFormat
- Annotations
- @deprecated @inline()
- Deprecated
(Since version 2.12.16) Use
formatString.format(value)instead ofvalue.formatted(formatString), or use thef""string interpolator. In Java 15 and later,formattedresolves to the new method in String which has reversed parameters.
- final macro def increasePrecision(that: Int): Interval
Increase the precision of this Interval, moves the binary point to the left.
Increase the precision of this Interval, moves the binary point to the left. aaa.bbb -> aaa.bbb00
- that
how many bits to shift binary point
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- def litToBigDecimal: BigDecimal
Return the scala.math.BigDecimal value of this instance assuming it is a literal (convenience method)
Return the scala.math.BigDecimal value of this instance assuming it is a literal (convenience method)
- Definition Classes
- HasBinaryPoint
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- def litToBigDecimalOption: Option[BigDecimal]
Return the scala.math.BigDecimal value of this instance if it is a Literal
Return the scala.math.BigDecimal value of this instance if it is a Literal
- Definition Classes
- HasBinaryPoint
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- Note
this method may throw an exception if the literal value won't fit in a BigDecimal
- def litToDouble: Double
Return the double value of this instance assuming it is a literal (convenience method)
Return the double value of this instance assuming it is a literal (convenience method)
- Definition Classes
- HasBinaryPoint
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- def litToDoubleOption: Option[Double]
Return the
Doublevalue of this instance if it is a LiteralReturn the
Doublevalue of this instance if it is a Literal- Definition Classes
- HasBinaryPoint
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- Note
this method may throw an exception if the literal value won't fit in a Double
- final macro def setPrecision(that: Int): Interval
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def squeeze(that: IntervalRange): Interval
Squeeze returns the intersection of the ranges this interval and that IntervalRange Ignores binary point of argument Treat as an unsafe cast; gives undefined behavior if this signal's value is outside of the resulting range Adds no additional hardware; this strictly an unsafe type conversion to use at your own risk
Squeeze returns the intersection of the ranges this interval and that IntervalRange Ignores binary point of argument Treat as an unsafe cast; gives undefined behavior if this signal's value is outside of the resulting range Adds no additional hardware; this strictly an unsafe type conversion to use at your own risk
- that
an Interval whose properties determine the squeezing
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def squeeze(that: SInt): Interval
Squeeze returns the intersection of the ranges this interval and that SInt Currently, that must have a defined width Treat as an unsafe cast; gives undefined behavior if this signal's value is outside of the resulting range Adds no additional hardware; this strictly an unsafe type conversion to use at your own risk
Squeeze returns the intersection of the ranges this interval and that SInt Currently, that must have a defined width Treat as an unsafe cast; gives undefined behavior if this signal's value is outside of the resulting range Adds no additional hardware; this strictly an unsafe type conversion to use at your own risk
- that
an SInt whose properties determine the squeezing
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def squeeze(that: UInt): Interval
Squeeze returns the intersection of the ranges this interval and that UInt Currently, that must have a defined width Treat as an unsafe cast; gives undefined behavior if this signal's value is outside of the resulting range Adds no additional hardware; this strictly an unsafe type conversion to use at your own risk
Squeeze returns the intersection of the ranges this interval and that UInt Currently, that must have a defined width Treat as an unsafe cast; gives undefined behavior if this signal's value is outside of the resulting range Adds no additional hardware; this strictly an unsafe type conversion to use at your own risk
- that
an UInt whose properties determine the squeezing
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def squeeze(that: Interval): Interval
Squeeze returns the intersection of the ranges this interval and that Interval Ignores binary point of argument Treat as an unsafe cast; gives undefined behavior if this signal's value is outside of the resulting range Adds no additional hardware; this strictly an unsafe type conversion to use at your own risk
Squeeze returns the intersection of the ranges this interval and that Interval Ignores binary point of argument Treat as an unsafe cast; gives undefined behavior if this signal's value is outside of the resulting range Adds no additional hardware; this strictly an unsafe type conversion to use at your own risk
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- def toString(): String
- Definition Classes
- Interval → AnyRef → Any
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- def toType: String
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def unary_-: Interval
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def unary_-%: Interval
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def wrap(that: IntervalRange): Interval
Wrap this interval into the range determined by an IntervalRange Adds hardware to change values outside of wrapped range to be at the boundary Errors if requires wrapping more than once Ignores binary point of argument
Wrap this interval into the range determined by an IntervalRange Adds hardware to change values outside of wrapped range to be at the boundary Errors if requires wrapping more than once Ignores binary point of argument
- that
an Interval whose properties determine the bounds of the wrap
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def wrap(that: SInt): Interval
Wrap this interval into the range determined by an SInt Errors if requires wrapping more than once
Wrap this interval into the range determined by an SInt Errors if requires wrapping more than once
- that
an SInt whose properties determine the bounds of the wrap
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def wrap(that: UInt): Interval
Wrap this interval into the range determined by that UInt Errors if requires wrapping more than once
Wrap this interval into the range determined by that UInt Errors if requires wrapping more than once
- that
an UInt whose properties determine the wrap
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def wrap(that: Interval): Interval
Wrap the value of this Interval into the range of a different Interval with a presumably smaller range.
Wrap the value of this Interval into the range of a different Interval with a presumably smaller range. Ignores binary point of argument Errors if requires wrapping more than once
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- final macro def |(that: Interval): Interval
- Annotations
- @deprecated
- Deprecated
(Since version Chisel 3.6) this feature will not be supported as part of the migration to the MLIR-based FIRRTL Compiler (MFC). For more information about this migration, please see the Chisel ROADMAP.md.
- def →[B](y: B): (Interval, B)
- Implicit
- This member is added by an implicit conversion from Interval toArrowAssoc[Interval] performed by method ArrowAssoc in scala.Predef.
- Definition Classes
- ArrowAssoc
- Annotations
- @deprecated
- Deprecated
(Since version 2.13.0) Use
->instead. If you still wish to display it as one character, consider using a font with programming ligatures such as Fira Code.
Inherited from HasBinaryPoint
Inherited from Bits
Inherited from ToBoolable
Inherited from Element
Inherited from Data
Inherited from SourceInfoDoc
Inherited from NamedComponent
Inherited from HasId
Inherited from InstanceId
Inherited from AnyRef
Inherited from Any
Inherited by implicit conversion DataEquality fromInterval to DataEquality[Interval]
Inherited by implicit conversion toConnectableDefault fromInterval to Connectable[Interval]
Inherited by implicit conversion ConnectableDefault fromInterval to ConnectableDefault[Interval]
Arithmetic
Arithmetic hardware operators
Bitwise
Bitwise hardware operators
Comparison
Comparison hardware operators
connection
Ungrouped
SourceInfoTransformMacro
These internal methods are not part of the public-facing API!
The equivalent public-facing methods do not have the do_ prefix or have the same name. Use and look at the
documentation for those. If you want left shift, use <<, not do_<<. If you want conversion to a
Seq of Bools look at the asBools above, not the one below. Users can safely ignore
every method in this group!
🐉🐉🐉 Here be dragons... 🐉🐉🐉
These do_X methods are used to enable both implicit passing of SourceInfo and chisel3.CompileOptions
while also supporting chained apply methods. In effect all "normal" methods that you, as a user, will use in your
designs, are converted to their "hidden", do_*, via macro transformations. Without using macros here, only one
of the above wanted behaviors is allowed (implicit passing and chained applies)---the compiler interprets a
chained apply as an explicit 'implicit' argument and will throw type errors.
The "normal", public-facing methods then take no SourceInfo. However, a macro transforms this public-facing method
into a call to an internal, hidden do_* that takes an explicit SourceInfo by inserting an
implicitly[SourceInfo] as the explicit argument.
This is the documentation for Chisel.
Package structure
The chisel3 package presents the public API of Chisel. It contains the concrete core types
UInt,SInt,Bool,FixedPoint,Clock, andReg, the abstract typesBits,Aggregate, andData, and the aggregate typesBundleandVec.The Chisel package is a compatibility layer that attempts to provide chisel2 compatibility in chisel3.
Utility objects and methods are found in the
utilpackage.The
testerspackage defines the basic interface for chisel testers.