Hardware module that is used to sequence n producers into 1 consumer.
An I/O bundle for the Arbiter
Asynchronous Fifo.
A class to create bit patterns Use the BitPat object instead of this class directly
Base class for built-in Chisel types Bits and SInt.
This class allows the connection to Verilog modules outside of chisel after generation
Defines a collection of datum of different types into a single coherent whole.
Create a new clock
Complex number representation create using the object Complex
A counter module, can also be created using Counter
*Data* is part of the *Node* Composite Pattern class hierarchy.
A double precision floating point representation Create using Dbl
An I/O Bundle with simple handshaking using valid and ready signals for data 'bits'
An I/O bundle for dequeuing data with valid/ready handshaking
An I/O bundle for enqueuing data with valid/ready handshaking
class with no inline mem
A Fixed point data type
A 32 bit floating point representation class Create using the Flo object
Stores the actual value of a scala literal as a string.
Compute Log2 with truncation Use the Log2 object rather than this class directly
A class defining an Operator which has a output width log2 of the number of input bits
A tester to check a node graph from INPUTs to OUTPUTs directly
A Module or block to logically divide a hardware design
Mux class defined as an operator
This trait allows an instantiation of something to be given a particular name
*Node* defines the root class of the class hierarchy for a [Composite Pattern](http://en.
This trait enforces numerical properties on the data such as being able to add, subtract, multiply, divide etc
Converts a One Hot encoding to a UInt Use the OHToUInt object rather than this class directly
A hardware module that delays data coming down the pipeline by the number of cycles set by the latency parameter.
A class to detect the trailing bit Use the PriorityEncoder object rather than this class directly
A hardware module implementing a Queue
An I/O Bundle for Queues
Class defining a ROM Use the ROM object rather than instantiating the ROM directly
ROMData stores the data for ROM
Class to read from ROM - internal, do not use
Hardware module that is used to sequence n producers into 1 consumer.
If we have structured/aggregate types as top-level ports, we define suitable structures for encapsulating their components, in order to treat them as sc_fifo elements.
This class is the super class for test cases
An I/O Bundle containing data and a signal determining if it is valid
This class enables the definition of verilog parameters without having to to string building
Version - dotted string with up to three components.
Create a new width
A class representing the when block Use when rather than this class directly
Compute the acos or inverse cos value of a Flo or Dbl returning the result in radians
Compute the asin or inverse sin value of a Flo or Dbl returning the result in radians
Compute the atan or inverse tan value of a Flo or Dbl returning the result in radians
Arbiter Control determining which producer has access
A bit pattern object to enable representation of dont cares
This Singleton implements a log4j compatible interface.
Create a new Clock
Representation for complex numbers
Counter Object for Counter
Create a 64 bit double precision floating point representation
Adds a ready-valid handshaking protocol to any interface
DelayBetween works out the number of registers or delays for all possible directional paths between two nodes
An object for creating C style Enums
Fill fans out a Node to multiple copies
Factory methods for Fixed
Create a 32 bit floating point Object
Define the IODirection INPUT
linear feedback shift register
A factory for literal values
Compute Log2 with truncation of a UInt in hardware using a Mux Tree An alternative interpretation is it computes the minimum number of bits needed to represent x
*seqRead* means that if a port tries to read the same address that another port is writing to in the same cycle, the read data is random garbage (from a LFSR, which returns "1" on its first invocation).
Methods to insert Modules into components correctly
A multiplexor which is a generalization of Mux to use nodes which aren't bools Mux uses this method internally If the values are not literals a Mux class is created and initialized
Implement a Multiplexor with a Bool A convienient wrapper for Multiplex
Builds a Mux tree out of the input signal vector using a one hot encoded select signal.
MuxCase returns the first value that is enabled in a map of values
MuxLookup creates a cascade of n Muxs to search for a key value
Define the IODirection NODIR
NodeFill copys an instance of a Node multiple times or fans it out Any change to a Node such as setting inputs or changing width will is applied to all of them
Converts from One Hot Encoding to a UInt indicating which bit is active This is the inverse of UIntToOH
Define the IODirection OUTPUT
Similar to a shift register but with handshaking at start
Returns the number of bits set (i.
Returns a bit vector in which only the least-significant 1 bit in the input vector, if any, is set.
Builds a Mux tree under the assumption that multiple select signals can be enabled.
Generic hardware queue.
Read Only Memory object Optionally create in a map with integer addresses attached Create a Vec of literals rather than ROM directly
A register with an Enable signal
Litte/big bit endian conversion: reverse the order of the bits in a UInt.
Returns the n-cycle delayed version of the input signal.
Adds a valid protocol to any interface By default this creates a ValidIO class with valid and bits set to OUTPUT
Get the number of bits required
Chisel3 - Wrap a Chisel data type with a Wire.
Cast a node to be Bits
If there is an environment variable chiselArguments, construct an Array[String]
of its value split on ' ', otherwise, return a 0 length Array[String]
_chiselMain_ behaves as if it constructs an execution tree from the constructor of a sub class of Module which is passed as a parameter.
Compute the conjugate of a complex number using the function conj
Fold Right with a function
An object for separate cases in switch It is equivalent to a when block comparing to the condition Use outside of a switch statement is illegal
Usefulness is questionable, remove?
Check if an Integer is a power of 2
Compute the log2 rounded up
Compute the log2 rounded down with min value of 1
Compute the log2 rounded down
Compute the log2 rounded up with min value of 1
Conditional logic to form a switch block
This is identical to when with the condition inverted
An object to create conditional logic See when for functions elsewhen and otherwise