Type Members

1.  class AddDescriptionNodes extends Transform

   Wraps modules or statements with their respective described nodes.

   Wraps modules or statements with their respective described nodes. Descriptions come from DescriptionAnnotation. Describing a module or any of its ports will turn it into a DescribedMod. Describing a Statement will turn it into a (private) DescribedStmt.

   Note

   should only be used by VerilogEmitter, described nodes will break other transforms.

2.  class AnnotationSeq extends AnyRef

   Container of all annotations for a Firrtl compiler

3.  case class CDefMPort(info: Info, name: String, tpe: Type, mem: String, exps: Seq[Expression], direction: MPortDir) extends Statement with HasInfo with Product with Serializable
4.  case class CDefMemory(info: Info, name: String, tpe: Type, size: BigInt, seq: Boolean, readUnderWrite: ir.ReadUnderWrite.Value = ReadUnderWrite.Undefined) extends Statement with HasInfo with Product with Serializable
5.  class ChirrtlEmitter extends FirrtlEmitter
6.  class ChirrtlToHighFirrtl extends CoreTransform

   This transforms "CHIRRTL", the chisel3 IR, to "Firrtl".

   This transforms "CHIRRTL", the chisel3 IR, to "Firrtl". Note the resulting circuit has only IR nodes, not WIR.

7.  sealed abstract class CircuitForm extends Ordered[CircuitForm]

   Current form of the Firrtl Circuit

   Current form of the Firrtl Circuit

   Form is a measure of addition restrictions on the legality of a Firrtl circuit. There is a notion of "highness" and "lowness" implemented in the compiler by extending scala.math.Ordered. "Lower" forms add additional restrictions compared to "higher" forms. This means that "higher" forms are strictly supersets of the "lower" forms. Thus, that any transform that operates on HighForm can also operate on MidForm or LowForm

8.  case class CircuitState(circuit: Circuit, form: CircuitForm, annotations: AnnotationSeq, renames: Option[RenameMap]) extends Product with Serializable

   Current State of the Circuit

   Current State of the Circuit

   circuit

   The current state of the Firrtl AST

   form

   The current form of the circuit

   annotations

   The current collection of Annotation

   renames

   A map of Named things that have been renamed. Generally only a return value from Transforms

9.  trait Compiler extends LazyLogging
10.  trait Constraint extends AnyRef
11.  sealed abstract class CoreTransform extends SeqTransform
12.  case class CustomTransformException(cause: Throwable) extends Exception with Product with Serializable

    Wraps exceptions from CustomTransforms so they can be reported appropriately

13.  case class DescriptionAnnotation(named: Named, description: String) extends Annotation with Product with Serializable
14.  case class EmitAllModulesAnnotation(emitter: Class[_ <: Emitter]) extends EmitAnnotation with Product with Serializable
15.  sealed trait EmitAnnotation extends NoTargetAnnotation
16.  case class EmitCircuitAnnotation(emitter: Class[_ <: Emitter]) extends EmitAnnotation with Product with Serializable
17.  sealed trait EmittedAnnotation[T <: EmittedComponent] extends NoTargetAnnotation

    Traits for Annotations containing emitted components

18.  sealed abstract class EmittedCircuit extends EmittedComponent
19.  sealed trait EmittedCircuitAnnotation[T <: EmittedCircuit] extends EmittedAnnotation[T]
20.  sealed abstract class EmittedComponent extends AnyRef
21.  final case class EmittedFirrtlCircuit(name: String, value: String, outputSuffix: String) extends EmittedCircuit with Product with Serializable
22.  case class EmittedFirrtlCircuitAnnotation(value: EmittedFirrtlCircuit) extends EmittedCircuitAnnotation[EmittedFirrtlCircuit] with Product with Serializable
23.  final case class EmittedFirrtlModule(name: String, value: String, outputSuffix: String) extends EmittedModule with Product with Serializable
24.  case class EmittedFirrtlModuleAnnotation(value: EmittedFirrtlModule) extends EmittedModuleAnnotation[EmittedFirrtlModule] with Product with Serializable
25.  sealed abstract class EmittedModule extends EmittedComponent
26.  sealed trait EmittedModuleAnnotation[T <: EmittedModule] extends EmittedAnnotation[T]
27.  final case class EmittedVerilogCircuit(name: String, value: String, outputSuffix: String) extends EmittedCircuit with Product with Serializable
28.  case class EmittedVerilogCircuitAnnotation(value: EmittedVerilogCircuit) extends EmittedCircuitAnnotation[EmittedVerilogCircuit] with Product with Serializable
29.  final case class EmittedVerilogModule(name: String, value: String, outputSuffix: String) extends EmittedModule with Product with Serializable
30.  case class EmittedVerilogModuleAnnotation(value: EmittedVerilogModule) extends EmittedModuleAnnotation[EmittedVerilogModule] with Product with Serializable
31.  trait Emitter extends Transform

    Defines old API for Emission.

    Defines old API for Emission. Deprecated

32.  case class EmitterException(message: String) extends PassException with Product with Serializable
33.  case class ExpWidth(arg1: Width) extends Width with HasMapWidth with Product with Serializable
34.  sealed abstract class FirrtlEmitter extends Transform with Emitter
35.  final class FirrtlProtos extends AnyRef
36.  class FirrtlUserException extends RuntimeException with NoStackTrace

    Exception indicating user error

    Exception indicating user error

    These exceptions indicate a problem due to bad input and thus do not include a stack trace. This can be extended by custom transform writers.

37.  trait Flow extends AnyRef
38.  class HighFirrtlCompiler extends Compiler

    Emits input circuit Will replace Chirrtl constructs with Firrtl

39.  class HighFirrtlEmitter extends FirrtlEmitter
40.  class HighFirrtlToMiddleFirrtl extends CoreTransform

    Expands aggregate connects, removes dynamic accesses, and when statements.

    Expands aggregate connects, removes dynamic accesses, and when statements. Checks for uninitialized values. Must accept a well-formed graph. Operates on working IR nodes.

41.  class IRToWorkingIR extends CoreTransform

    Converts from the bare intermediate representation (ir.scala) to a working representation (WIR.scala)

42.  case class InvalidEscapeCharException(message: String) extends ParserException with Product with Serializable
43.  case class InvalidStringLitException(message: String) extends ParserException with Product with Serializable
44.  trait Kind extends AnyRef
45.  abstract class LexerHelper extends AnyRef
46.  class LowFirrtlCompiler extends Compiler

    Emits lowered input circuit

47.  class LowFirrtlEmitter extends FirrtlEmitter
48.  class LowFirrtlOptimization extends CoreTransform

    Runs a series of optimization passes on LowFirrtl

    Runs a series of optimization passes on LowFirrtl

    Note

    This is currently required for correct Verilog emission TODO Fix the above note

49.  abstract class MPortDir extends FirrtlNode
50.  case class MaxWidth(args: Seq[Width]) extends Width with HasMapWidth with Product with Serializable
51.  class MemoizedHash[T] extends AnyRef
52.  class MiddleFirrtlCompiler extends Compiler

    Emits middle Firrtl input circuit

53.  class MiddleFirrtlEmitter extends FirrtlEmitter
54.  class MiddleFirrtlToLowFirrtl extends CoreTransform

    Expands all aggregate types into many ground-typed components.

    Expands all aggregate types into many ground-typed components. Must accept a well-formed graph of only middle Firrtl features. Operates on working IR nodes.

55.  case class MinWidth(args: Seq[Width]) extends Width with HasMapWidth with Product with Serializable
56.  class MinimumLowFirrtlOptimization extends CoreTransform

    Runs runs only the optimization passes needed for Verilog emission

57.  class MinimumVerilogCompiler extends Compiler

    Emits Verilog without optimizations

58.  class MinimumVerilogEmitter extends VerilogEmitter with Emitter
59.  case class MinusWidth(arg1: Width, arg2: Width) extends Width with HasMapWidth with Product with Serializable
60.  class ModuleGraph extends AnyRef

    Maintains a one to many graph of each modules instantiated child module.

    Maintains a one to many graph of each modules instantiated child module. This graph can be searched for a path from a child module back to one of it's parents. If one is found a recursive loop has happened The graph is a map between the name of a node to set of names of that nodes children

61.  class Namespace extends AnyRef
62.  class NoneCompiler extends Compiler

    Emits input circuit with no changes

    Emits input circuit with no changes

    Primarily useful for changing between .fir and .pb serialized formats

63.  final case class OneFilePerModule(targetDir: String) extends OutputConfig with Product with Serializable
64.  sealed abstract class OutputConfig extends AnyRef

    Firrtl output configuration specified by FirrtlExecutionOptions

    Firrtl output configuration specified by FirrtlExecutionOptions

    Derived from the fields of the execution options

    See also

    FirrtlExecutionOptions.getOutputConfig

65.  case class ParameterNotSpecifiedException(message: String) extends ParserException with Product with Serializable
66.  case class ParameterRedefinedException(message: String) extends ParserException with Product with Serializable
67.  class ParserException extends FirrtlUserException
68.  case class PlusWidth(arg1: Width, arg2: Width) extends Width with HasMapWidth with Product with Serializable
69.  final class RenameMap extends AnyRef

    Map old names to new names

    Map old names to new names

    Transforms that modify names should return a RenameMap with the CircuitState These are mutable datastructures for convenience

70.  class ResolveAndCheck extends CoreTransform

    Resolves types, kinds, and flows, and checks the circuit legality.

    Resolves types, kinds, and flows, and checks the circuit legality. Operates on working IR nodes and high Firrtl.

71.  trait ResolvedAnnotationPaths extends AnyRef

    Extend for transforms that require resolved targets in their annotations Ensures all targets in annotations of a class in annotationClasses are resolved before the execute method

72.  abstract class SeqTransform extends Transform with SeqTransformBased

    For transformations that are simply a sequence of transforms

73.  trait SeqTransformBased extends AnyRef
74.  final case class SingleFile(targetFile: String) extends OutputConfig with Product with Serializable
75.  case class SyntaxErrorsException(message: String) extends ParserException with Product with Serializable
76.  class SystemVerilogCompiler extends VerilogCompiler

    Currently just an alias for the VerilogCompiler

77.  class SystemVerilogEmitter extends VerilogEmitter
78.  abstract class Transform extends TransformLike[CircuitState]

    The basic unit of operating on a Firrtl AST

79.  case class VRandom(width: BigInt) extends Expression with Product with Serializable
80.  case class VarWidth(name: String) extends Width with HasMapWidth with Product with Serializable
81.  class VerilogCompiler extends Compiler

    Emits Verilog

82.  class VerilogEmitter extends SeqTransform with Emitter
83.  class Visitor extends AbstractParseTreeVisitor[FirrtlNode] with ParseTreeVisitor[FirrtlNode]
84.  case class WDefInstance(info: Info, name: String, module: String, tpe: Type) extends Statement with IsDeclaration with Product with Serializable
85.  case class WDefInstanceConnector(info: Info, name: String, module: String, tpe: Type, portCons: Seq[(Expression, Expression)]) extends Statement with IsDeclaration with Product with Serializable
86.  class WGeq extends Constraint
87.  case class WRef(name: String, tpe: Type, kind: Kind, flow: Flow) extends Expression with GenderFromFlow with Product with Serializable
88.  case class WSubAccess(expr: Expression, index: Expression, tpe: Type, flow: Flow) extends Expression with GenderFromFlow with Product with Serializable
89.  case class WSubField(expr: Expression, name: String, tpe: Type, flow: Flow) extends Expression with GenderFromFlow with Product with Serializable
90.  case class WSubIndex(expr: Expression, value: Int, tpe: Type, flow: Flow) extends Expression with GenderFromFlow with Product with Serializable
91.  class WrappedExpression extends AnyRef
92.  class WrappedType extends AnyRef
93.  class WrappedWidth extends AnyRef
94.  case class CommonOptions(topName: String = "", targetDirName: String = ".", globalLogLevel: logger.LogLevel.Value = LogLevel.None, logToFile: Boolean = false, logClassNames: Boolean = false, classLogLevels: Map[String, logger.LogLevel.Value] = Map.empty, programArgs: Seq[String] = Seq.empty) extends ComposableOptions with Product with Serializable

    Most of the chisel toolchain components require a topName which defines a circuit or a device under test.

    Most of the chisel toolchain components require a topName which defines a circuit or a device under test. Much of the work that is done takes place in a directory. It would be simplest to require topName to be defined but in practice it is preferred to defer this. For example, in chisel, by deferring this it is possible for the execute there to first elaborate the circuit and then set the topName from that if it has not already been set.

    Annotations

    @deprecated

    Deprecated

    (Since version 1.2) Use a FirrtlOptionsView, LoggerOptionsView, or construct your own view of an AnnotationSeq

95.  trait ComposableOptions extends AnyRef

    Use this trait to define an options class that can add its private command line options to a externally declared parser.

    Use this trait to define an options class that can add its private command line options to a externally declared parser. NOTE In all derived trait/classes, if you intend on maintaining backwards compatibility, be sure to add new options at the end of the current ones and don't remove any existing ones.

    Annotations

    @deprecated

    Deprecated

    (Since version 1.2) Use firrtl.options.HasScoptOptions and/or library/transform registration

96.  class ExecutionOptionsManager extends HasParser with HasCommonOptions
    Annotations

    @deprecated

    Deprecated

    (Since version 1.2) Use new FirrtlStage infrastructure

97.  class FIRRTLException extends RuntimeException

    Annotations

    @deprecated

    Deprecated

    (Since version 1.2) External users should use either FirrtlUserException or their own hierarchy

98.  case class FirrtlExecutionFailure(message: String) extends FirrtlExecutionResult with Product with Serializable

    The firrtl compilation failed.

    The firrtl compilation failed.

    message

    Some kind of hint as to what went wrong.

    Annotations

    @deprecated

    Deprecated

    (Since version 1.2) Use FirrtlStage and examine the output AnnotationSeq directly

99.  case class FirrtlExecutionOptions(inputFileNameOverride: String = "", outputFileNameOverride: String = "", compilerName: String = "verilog", infoModeName: String = "append", inferRW: Seq[String] = Seq.empty, firrtlSource: Option[String] = None, customTransforms: Seq[Transform] = List.empty, annotations: List[Annotation] = List.empty, annotationFileNameOverride: String = "", outputAnnotationFileName: String = "", emitOneFilePerModule: Boolean = false, dontCheckCombLoops: Boolean = false, noDCE: Boolean = false, annotationFileNames: List[String] = List.empty, firrtlCircuit: Option[Circuit] = None) extends ComposableOptions with Product with Serializable

    The options that firrtl supports in callable component sense

    The options that firrtl supports in callable component sense

    inputFileNameOverride

    default is targetDir/topName.fir

    outputFileNameOverride

    default is targetDir/topName.v the .v is based on the compilerName parameter

    compilerName

    which compiler to use

    annotations

    annotations to pass to compiler

    Annotations

    @deprecated

    Deprecated

    (Since version 1.2) Use a FirrtlOptionsView or construct your own view of an AnnotationSeq

100.  sealed trait FirrtlExecutionResult extends AnyRef

     Annotations

     @deprecated

     Deprecated

     (Since version 1.2) Use FirrtlStage and examine the output AnnotationSeq directly

101.  class FirrtlExecutionSuccess extends FirrtlExecutionResult

     Indicates a successful execution of the firrtl compiler, returning the compiled result and the type of compile

     Indicates a successful execution of the firrtl compiler, returning the compiled result and the type of compile

     Annotations

     @deprecated

     Deprecated

     (Since version 1.2) Use FirrtlStage and examine the output AnnotationSeq directly

102.  trait Gender extends AnyRef

     Annotations

     @deprecated

     Deprecated

     (Since version 1.2) Use Flow instead of Gender. This trait will be removed in 1.3

103.  trait HasCommonOptions extends AnyRef

     Annotations

     @deprecated

     Deprecated

     (Since version 1.2) Specify command line arguments in an Annotation mixing in HasScoptOptions

104.  trait HasFirrtlOptions extends AnyRef

     Annotations

     @deprecated

     Deprecated

     (Since version 1.2) Specify command line arguments in an Annotation mixing in HasScoptOptions

105.  abstract class HasParser extends AnyRef

     Annotations

     @deprecated

     Deprecated

     (Since version 1.2) Use firrtl.options.{ExecutionOptionsManager, TerminateOnExit, DuplicateHandling}

106.  type TargetDirAnnotation = firrtl.options.TargetDirAnnotation

     Annotations

     @deprecated

     Deprecated

     (Since version 1.2) Use firrtl.stage.TargetDirAnnotation